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From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 4/4] drm/i915: Make next_seqno debugs entry to use i915_gem_seqno_init
Date: Tue, 18 Dec 2012 16:32:21 +0200	[thread overview]
Message-ID: <87fw33e8i2.fsf@gaia.fi.intel.com> (raw)
In-Reply-To: <f5ae8a$7t9vac@fmsmga002.fm.intel.com>

Chris Wilson <chris@chris-wilson.co.uk> writes:

> On Mon, 17 Dec 2012 18:44:26 +0200, Mika Kuoppala <mika.kuoppala@linux.intel.com> wrote:
>> Hardware status page needs to have proper seqno set
>> as our initial seqno can be arbitrary. If initial seqno is close
>> to wrap boundary on init and i915_seqno_passed() (31bit space)
>> refers to hw status page which contains zero, errorneous result
>> will be returned.
>> 
>> References: https://bugs.freedesktop.org/show_bug.cgi?id=58230
>> Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
>
> Looks good baring the last chunk.
>
>
>> @@ -1435,8 +1439,18 @@ int intel_ring_handle_seqno_wrap(struct intel_ring_buffer *ring)
>>  	 * post-wrap semaphore waits completing immediately. Clear them. */
>>  	update_mboxes(ring, ring->signal_mbox[0]);
>>  	update_mboxes(ring, ring->signal_mbox[1]);
>> +	intel_ring_emit(ring, MI_STORE_DWORD_INDEX);
>> +	intel_ring_emit(ring, I915_GEM_HWS_INDEX << MI_STORE_DWORD_INDEX_SHIFT);
>> +	intel_ring_emit(ring, seqno);
>> +	intel_ring_emit(ring, MI_USER_INTERRUPT);
>>  	intel_ring_advance(ring);
>>  
>> +	/* Wait until mboxes have actually cleared before pushing
>> +	 * anything to the rings */
>> +	ret = ring_wait_for_space(ring, ring->size - 8);
>> +	if (ret)
>> +		return ret;
>
> I don't this is well justified. Can you clearly explain the situation
> where it is required?

As the ring_add_request can it self cause seqno wrap due to
intel_ring_begin, and the fact that it will update the *other* rings
mboxes, we need to wait until all the rings have proceed with 
clearing the mboxes.


> How about if we assert that the ring is idle, and just blitz the
> registers and hws rather than go through the ring?
> -Chris

I have tried this but failed. I think the problem is ring_add_request.
It will still inject seqnos before the wrap boundary if intel_ring_begin
in itself just wrapped. This is why we need to clear mboxes and set 
the hws page through rings.

I have a patch which allocates seqnos explicitly early in
i915_gem_do_execbuffer, gets rid of outstanding_lazy_request and 
related i915_gem_check_olr completely thus making the wrap handling much more 
simpler as we don't need to be careful in ring_sync nor ring_add_request
as no cross wrap boundary stuff can no longer happen. But I got
the impression that you don't like this approach.

-Mika

> -- 
> Chris Wilson, Intel Open Source Technology Centre

  reply	other threads:[~2012-12-18 14:32 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-12-17 16:44 [PATCH 1/4] drm/i915: Initialize hardware semaphore state on ring init Mika Kuoppala
2012-12-17 16:44 ` [PATCH 2/4] drm/i915: Always clear semaphore mboxes on seqno wrap Mika Kuoppala
2012-12-17 19:15   ` Chris Wilson
2012-12-18 14:19     ` Mika Kuoppala
2012-12-18 14:29       ` Chris Wilson
2012-12-17 16:44 ` [PATCH 3/4] drm/i915: Introduce i915_gem_seqno_init Mika Kuoppala
2012-12-17 16:44 ` [PATCH 4/4] drm/i915: Make next_seqno debugs entry to use i915_gem_seqno_init Mika Kuoppala
2012-12-17 19:13   ` Chris Wilson
2012-12-18 14:32     ` Mika Kuoppala [this message]
2012-12-18 14:47       ` Chris Wilson
2012-12-18 15:49         ` Mika Kuoppala
2012-12-17 19:17   ` Chris Wilson
2012-12-18 14:33     ` Mika Kuoppala

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