All of lore.kernel.org
 help / color / mirror / Atom feed
From: Thomas Gleixner <tglx@kernel.org>
To: Jiaxun Yang <jiaxun.yang@flygoat.com>,
	Huacai Chen <chenhuacai@loongson.cn>
Cc: loongarch@lists.linux.dev, linux-kernel@vger.kernel.org,
	Xuefeng Li <lixuefeng@loongson.cn>,
	Huacai Chen <chenhuacai@gmail.com>
Subject: Re: [PATCH 1/7] irqchip/loongarch-avec: Adjust irqchip driver for 32BIT/64BIT
Date: Fri, 09 Jan 2026 21:37:44 +0100	[thread overview]
Message-ID: <87h5suiktj.ffs@tglx> (raw)
In-Reply-To: <57748542-d86e-4528-bea3-8f8d8f1abbed@app.fastmail.com>

On Fri, Jan 09 2026 at 12:23, Jiaxun Yang wrote:
> On Fri, 9 Jan 2026, at 12:09 PM, Thomas Gleixner wrote:
>>>  static inline void avecintc_enable(void)
>>>  {
>>> +#ifdef CONFIG_MACH_LOONGSON64
>>>  	u64 value;
>>>  
>>>  	value = iocsr_read64(LOONGARCH_IOCSR_MISC_FUNC);
>>>  	value |= IOCSR_MISC_FUNC_AVEC_EN;
>>>  	iocsr_write64(value, LOONGARCH_IOCSR_MISC_FUNC);
>>> +#endif
>>
>> Can't this be:
>>
>>       if (IS_ENABLED(CONFIG_MACH_LOONGSON64))
>>
>> which is preferred over ifdeffery?
>
> Sadly, iocsr_read64 symbol is only available on 64 bit systems,
> so it must be guarded somehow.

It's unconditionally defined so using IS_ENABLED() is fine because the
compiler optimizes everything out before the resolv stage.

Thanks,

        tglx

  reply	other threads:[~2026-01-09 20:37 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-12-23  8:04 [PATCH 0/7] irqchip: Adjust LoongArch irqchip drivers for 32BIT/64BIT Huacai Chen
2025-12-23  8:04 ` [PATCH 1/7] irqchip/loongarch-avec: Adjust irqchip driver " Huacai Chen
2026-01-09 12:09   ` Thomas Gleixner
2026-01-09 12:23     ` Jiaxun Yang
2026-01-09 20:37       ` Thomas Gleixner [this message]
2026-01-13  4:41         ` Huacai Chen
2026-01-10  3:48     ` Huacai Chen
2025-12-23  8:04 ` [PATCH 2/7] irqchip/loongson-liointc: " Huacai Chen
2025-12-23  8:04 ` [PATCH 3/7] irqchip/loongson-eiointc: " Huacai Chen
2025-12-23  8:04 ` [PATCH 4/7] irqchip/loongson-htvec: " Huacai Chen
2025-12-23  8:04 ` [PATCH 5/7] irqchip/loongson-pch-msi: " Huacai Chen
2025-12-23  8:04 ` [PATCH 6/7] irqchip/loongson-pch-pic: " Huacai Chen
2025-12-23  8:04 ` [PATCH 7/7] irqchip: Allow LoongArch irqchip drivers on both 32BIT/64BIT Huacai Chen

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=87h5suiktj.ffs@tglx \
    --to=tglx@kernel.org \
    --cc=chenhuacai@gmail.com \
    --cc=chenhuacai@loongson.cn \
    --cc=jiaxun.yang@flygoat.com \
    --cc=linux-kernel@vger.kernel.org \
    --cc=lixuefeng@loongson.cn \
    --cc=loongarch@lists.linux.dev \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.