All of lore.kernel.org
 help / color / mirror / Atom feed
From: Jani Nikula <jani.nikula@linux.intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>,
	intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 06/10] drm/i915: Consult the registested encoders for the ICL combo PHY w/a
Date: Mon, 13 Feb 2023 18:12:19 +0200	[thread overview]
Message-ID: <87h6vpv924.fsf@intel.com> (raw)
In-Reply-To: <20230208015508.24824-7-ville.syrjala@linux.intel.com>

On Wed, 08 Feb 2023, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Subject: *registered

>
> Display WA #1178 calls us to tweak some magic bits when doing AUX
> to an external combo PHY port. Instead of looking to see if the VBT
> has declared such a port (which could in theory even alias with a
> declared eDP port on the same PHY) just check the real situation
> based on the registered encoders.
>
> The only slight chicken vs. egg situation here is during output
> probing. But typically we'd register the eDP ports first and so
> once we get to probe anything external on the combo PHY we have
> already determined if it's eDP or not.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  .../drm/i915/display/intel_display_power_well.c   | 15 ++++++++++++++-
>  1 file changed, 14 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power_well.c b/drivers/gpu/drm/i915/display/intel_display_power_well.c
> index 8710dd41ffd4..56a20bf5825b 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power_well.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_power_well.c
> @@ -391,6 +391,19 @@ static void hsw_power_well_disable(struct drm_i915_private *dev_priv,
>  	hsw_wait_for_power_well_disable(dev_priv, power_well);
>  }
>  
> +static bool intel_port_is_edp(struct drm_i915_private *i915, enum port port)
> +{
> +	struct intel_encoder *encoder;
> +
> +	for_each_intel_encoder(&i915->drm, encoder) {
> +		if (encoder->type == INTEL_OUTPUT_EDP &&
> +		    encoder->port == port)
> +			return true;
> +	}
> +
> +	return false;
> +}
> +
>  static void
>  icl_combo_phy_aux_power_well_enable(struct drm_i915_private *dev_priv,
>  				    struct i915_power_well *power_well)
> @@ -416,7 +429,7 @@ icl_combo_phy_aux_power_well_enable(struct drm_i915_private *dev_priv,
>  
>  	/* Display WA #1178: icl */
>  	if (pw_idx >= ICL_PW_CTL_IDX_AUX_A && pw_idx <= ICL_PW_CTL_IDX_AUX_B &&
> -	    !intel_bios_is_port_edp(dev_priv, (enum port)phy)) {
> +	    !intel_port_is_edp(dev_priv, (enum port)phy)) {
>  		val = intel_de_read(dev_priv, ICL_AUX_ANAOVRD1(pw_idx));
>  		val |= ICL_AUX_ANAOVRD1_ENABLE | ICL_AUX_ANAOVRD1_LDO_BYPASS;
>  		intel_de_write(dev_priv, ICL_AUX_ANAOVRD1(pw_idx), val);

-- 
Jani Nikula, Intel Open Source Graphics Center

  reply	other threads:[~2023-02-13 16:12 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-02-08  1:54 [Intel-gfx] [PATCH 00/10] drm/i915: Prep work for vbt.ports[] nukage Ville Syrjala
2023-02-08  1:54 ` [Intel-gfx] [PATCH 01/10] drm/i915: Pass the whole encoder to hotplug_enables() Ville Syrjala
2023-02-08  1:55 ` [Intel-gfx] [PATCH 02/10] drm/i915: Move variables to loop context Ville Syrjala
2023-02-08  1:55 ` [Intel-gfx] [PATCH 03/10] drm/i915: Replace intel_bios_is_lspcon_present() with intel_bios_encoder_is_lspcon() Ville Syrjala
2023-02-08  1:55 ` [Intel-gfx] [PATCH 04/10] drm/i915: Replace intel_bios_is_lane_reversal_needed() with intel_bios_encoder_lane_reversal() Ville Syrjala
2023-02-08  1:55 ` [Intel-gfx] [PATCH 05/10] drm/i915: Replace intel_bios_is_port_hpd_inverted() with intel_bios_encoder_hpd_invert() Ville Syrjala
2023-02-08  1:55 ` [Intel-gfx] [PATCH 06/10] drm/i915: Consult the registested encoders for the ICL combo PHY w/a Ville Syrjala
2023-02-13 16:12   ` Jani Nikula [this message]
2023-02-08  1:55 ` [Intel-gfx] [PATCH 07/10] drm/i915: Populate encoder->devdata for g4x+ DP/HDMI ports Ville Syrjala
2023-02-13 16:12   ` Jani Nikula
2023-02-08  1:55 ` [Intel-gfx] [PATCH 08/10] drm/i915: Pass devdata to intel_bios_port_aux_ch() Ville Syrjala
2023-02-08  1:55 ` [Intel-gfx] [PATCH 09/10] drm/i915: Iterate all child devs in intel_bios_is_port_present() Ville Syrjala
2023-02-13 16:08   ` Jani Nikula
2023-02-13 16:17     ` Ville Syrjälä
2023-02-13 16:41       ` Jani Nikula
2023-02-13 16:47         ` Ville Syrjälä
2023-02-14  7:38   ` [Intel-gfx] [PATCH v2 " Ville Syrjala
2023-02-14  8:11     ` Jani Nikula
2023-02-08  1:55 ` [Intel-gfx] [PATCH 10/10] drm/i915: Use encoder->devdata in eDP init Ville Syrjala
2023-02-13 16:13   ` Jani Nikula
2023-02-08  4:39 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Prep work for vbt.ports[] nukage Patchwork
2023-02-08  8:51 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2023-02-13 16:11 ` [Intel-gfx] [PATCH 00/10] " Jani Nikula
2023-02-14  8:20 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Prep work for vbt.ports[] nukage (rev2) Patchwork
2023-02-14  9:27 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=87h6vpv924.fsf@intel.com \
    --to=jani.nikula@linux.intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=ville.syrjala@linux.intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.