From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3DB47C4332F for ; Thu, 13 Oct 2022 22:28:38 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 266378951B; Thu, 13 Oct 2022 22:28:24 +0000 (UTC) Received: from mga06.intel.com (mga06b.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id D564610E9A4; Thu, 13 Oct 2022 22:28:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1665700097; x=1697236097; h=date:message-id:from:to:cc:subject:in-reply-to: references:mime-version; bh=8WE5077IhCrTkwnO/ZmqhJZk6Zp7bNwPPMpdIqUv6sU=; b=RovzhyWtnEzm23lsKOXBXSklZrt6nqhXPwldkLhFGWoX8eLGFWqVxMGV W5dFLNaVZWvwmjjr9iAcsfSa0Vd/UFWJ9Vf41vix4l0353tTiPz0HB35C po1b9L/Dmk3EDI/Vt+EJuGhx72avQCkQSkktIfo81BCEA8os6q29l0d/x Jdcmbpp+TQxTKiJkXrrdcSnVHYOzaQpl7TQxmbF6EuiuQZz3X5bliL8gZ 5Jf+f1PkjPEKhXJICsqLultb83YlixB3xnMxPeBBZYTwfv/dMJ62VfunO KmIjO+8sIkJeJ/renLIa8ljQVYr165SxUmAH2a/mHtaIgE/TvNgFa0buP A==; X-IronPort-AV: E=McAfee;i="6500,9779,10499"; a="367239560" X-IronPort-AV: E=Sophos;i="5.95,182,1661842800"; d="scan'208";a="367239560" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Oct 2022 15:28:17 -0700 X-IronPort-AV: E=McAfee;i="6500,9779,10499"; a="605152407" X-IronPort-AV: E=Sophos;i="5.95,182,1661842800"; d="scan'208";a="605152407" Received: from adixit-mobl.amr.corp.intel.com (HELO adixit-arch.intel.com) ([10.212.216.120]) by orsmga006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Oct 2022 15:28:17 -0700 Date: Thu, 13 Oct 2022 15:28:16 -0700 Message-ID: <87h707z7cv.wl-ashutosh.dixit@intel.com> From: "Dixit, Ashutosh" To: Vinay Belgaumkar In-Reply-To: <20221013155524.25886-1-vinay.belgaumkar@intel.com> References: <20221013155524.25886-1-vinay.belgaumkar@intel.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?ISO-8859-4?Q?Goj=F2?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/28.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII Subject: Re: [Intel-gfx] [PATCH v2] drm/i915/slpc: Use platform limits for min/max frequency X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, Rodrigo Vivi Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On Thu, 13 Oct 2022 08:55:24 -0700, Vinay Belgaumkar wrote: > Hi Vinay, > GuC will set the min/max frequencies to theoretical max on > ATS-M. This will break kernel ABI, so limit min/max frequency > to RP0(platform max) instead. Isn't what we are calling "theoretical max" or "RPmax" really just -1U (0xFFFFFFFF)? Though I have heard this is not a max value but -1U indicates FW default values unmodified by host SW, which would mean frequencies are fully controlled by FW (min == max == -1U). But if this were the case I don't know why this would be the case only for server, why doesn't FW set these for clients too to indicate it is fully in control? So the question what does -1U actually represent? Is it the RPmax value or does -1U represent "FW defaults"? Also this concept of using -1U as "FW defaults" is present in Level0/OneAPI (and likely in firmware) but we seem to have blocked in the i915 ABI. I understand we may not be able to make such changes at present but this provides some context for the review comments below. > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c > index fdd895f73f9f..11613d373a49 100644 > --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c > +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c > @@ -263,6 +263,7 @@ int intel_guc_slpc_init(struct intel_guc_slpc *slpc) > > slpc->max_freq_softlimit = 0; > slpc->min_freq_softlimit = 0; > + slpc->min_is_rpmax = false; > > slpc->boost_freq = 0; > atomic_set(&slpc->num_waiters, 0); > @@ -588,6 +589,31 @@ static int slpc_set_softlimits(struct intel_guc_slpc *slpc) > return 0; > } > > +static bool is_slpc_min_freq_rpmax(struct intel_guc_slpc *slpc) > +{ > + int slpc_min_freq; > + > + if (intel_guc_slpc_get_min_freq(slpc, &slpc_min_freq)) > + return false; > + > + if (slpc_min_freq > slpc->rp0_freq) > or >=. If what we are calling "rpmax" really -1U then why don't we just check for -1U here? u32 slpc_min_freq; if (slpc_min_freq == -1U) > + return true; > + else > + return false; > +} > + > +static void update_server_min_softlimit(struct intel_guc_slpc *slpc) > +{ > + /* For server parts, SLPC min will be at RPMax. > + * Use min softlimit to clamp it to RP0 instead. > + */ > + if (is_slpc_min_freq_rpmax(slpc) && > + !slpc->min_freq_softlimit) { > + slpc->min_is_rpmax = true; > + slpc->min_freq_softlimit = slpc->rp0_freq; Isn't it safer to use a platform check such as IS_ATSM or IS_XEHPSDV (or even #define IS_SERVER()) to set min freq to RP0 rather than this -1U value from FW? What if -1U means "FW defaults" and FW starts setting this on client products tomorrow? Also, we need to set gt->defaults.min_freq here. Thanks. -- Ashutosh > + } > +} > + > static int slpc_use_fused_rp0(struct intel_guc_slpc *slpc) > { > /* Force SLPC to used platform rp0 */ > @@ -647,6 +673,9 @@ int intel_guc_slpc_enable(struct intel_guc_slpc *slpc) > > slpc_get_rp_values(slpc); > > + /* Handle the case where min=max=RPmax */ > + update_server_min_softlimit(slpc); > + > /* Set SLPC max limit to RP0 */ > ret = slpc_use_fused_rp0(slpc); > if (unlikely(ret)) { > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc_types.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc_types.h > index 73d208123528..a6ef53b04e04 100644 > --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc_types.h > +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc_types.h > @@ -19,6 +19,9 @@ struct intel_guc_slpc { > bool supported; > bool selected; > > + /* Indicates this is a server part */ > + bool min_is_rpmax; > + > /* platform frequency limits */ > u32 min_freq; > u32 rp0_freq; > -- > 2.35.1 > From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8AE66C433FE for ; Thu, 13 Oct 2022 22:28:23 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 6811610E9A2; Thu, 13 Oct 2022 22:28:21 +0000 (UTC) Received: from mga06.intel.com (mga06b.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id D564610E9A4; Thu, 13 Oct 2022 22:28:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1665700097; x=1697236097; h=date:message-id:from:to:cc:subject:in-reply-to: references:mime-version; bh=8WE5077IhCrTkwnO/ZmqhJZk6Zp7bNwPPMpdIqUv6sU=; b=RovzhyWtnEzm23lsKOXBXSklZrt6nqhXPwldkLhFGWoX8eLGFWqVxMGV W5dFLNaVZWvwmjjr9iAcsfSa0Vd/UFWJ9Vf41vix4l0353tTiPz0HB35C po1b9L/Dmk3EDI/Vt+EJuGhx72avQCkQSkktIfo81BCEA8os6q29l0d/x Jdcmbpp+TQxTKiJkXrrdcSnVHYOzaQpl7TQxmbF6EuiuQZz3X5bliL8gZ 5Jf+f1PkjPEKhXJICsqLultb83YlixB3xnMxPeBBZYTwfv/dMJ62VfunO KmIjO+8sIkJeJ/renLIa8ljQVYr165SxUmAH2a/mHtaIgE/TvNgFa0buP A==; X-IronPort-AV: E=McAfee;i="6500,9779,10499"; a="367239560" X-IronPort-AV: E=Sophos;i="5.95,182,1661842800"; d="scan'208";a="367239560" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Oct 2022 15:28:17 -0700 X-IronPort-AV: E=McAfee;i="6500,9779,10499"; a="605152407" X-IronPort-AV: E=Sophos;i="5.95,182,1661842800"; d="scan'208";a="605152407" Received: from adixit-mobl.amr.corp.intel.com (HELO adixit-arch.intel.com) ([10.212.216.120]) by orsmga006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Oct 2022 15:28:17 -0700 Date: Thu, 13 Oct 2022 15:28:16 -0700 Message-ID: <87h707z7cv.wl-ashutosh.dixit@intel.com> From: "Dixit, Ashutosh" To: Vinay Belgaumkar Subject: Re: [PATCH v2] drm/i915/slpc: Use platform limits for min/max frequency In-Reply-To: <20221013155524.25886-1-vinay.belgaumkar@intel.com> References: <20221013155524.25886-1-vinay.belgaumkar@intel.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?ISO-8859-4?Q?Goj=F2?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/28.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: intel-gfx@lists.freedesktop.org, Riana Tauro , dri-devel@lists.freedesktop.org, Rodrigo Vivi Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" On Thu, 13 Oct 2022 08:55:24 -0700, Vinay Belgaumkar wrote: > Hi Vinay, > GuC will set the min/max frequencies to theoretical max on > ATS-M. This will break kernel ABI, so limit min/max frequency > to RP0(platform max) instead. Isn't what we are calling "theoretical max" or "RPmax" really just -1U (0xFFFFFFFF)? Though I have heard this is not a max value but -1U indicates FW default values unmodified by host SW, which would mean frequencies are fully controlled by FW (min == max == -1U). But if this were the case I don't know why this would be the case only for server, why doesn't FW set these for clients too to indicate it is fully in control? So the question what does -1U actually represent? Is it the RPmax value or does -1U represent "FW defaults"? Also this concept of using -1U as "FW defaults" is present in Level0/OneAPI (and likely in firmware) but we seem to have blocked in the i915 ABI. I understand we may not be able to make such changes at present but this provides some context for the review comments below. > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c > index fdd895f73f9f..11613d373a49 100644 > --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c > +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c > @@ -263,6 +263,7 @@ int intel_guc_slpc_init(struct intel_guc_slpc *slpc) > > slpc->max_freq_softlimit = 0; > slpc->min_freq_softlimit = 0; > + slpc->min_is_rpmax = false; > > slpc->boost_freq = 0; > atomic_set(&slpc->num_waiters, 0); > @@ -588,6 +589,31 @@ static int slpc_set_softlimits(struct intel_guc_slpc *slpc) > return 0; > } > > +static bool is_slpc_min_freq_rpmax(struct intel_guc_slpc *slpc) > +{ > + int slpc_min_freq; > + > + if (intel_guc_slpc_get_min_freq(slpc, &slpc_min_freq)) > + return false; > + > + if (slpc_min_freq > slpc->rp0_freq) > or >=. If what we are calling "rpmax" really -1U then why don't we just check for -1U here? u32 slpc_min_freq; if (slpc_min_freq == -1U) > + return true; > + else > + return false; > +} > + > +static void update_server_min_softlimit(struct intel_guc_slpc *slpc) > +{ > + /* For server parts, SLPC min will be at RPMax. > + * Use min softlimit to clamp it to RP0 instead. > + */ > + if (is_slpc_min_freq_rpmax(slpc) && > + !slpc->min_freq_softlimit) { > + slpc->min_is_rpmax = true; > + slpc->min_freq_softlimit = slpc->rp0_freq; Isn't it safer to use a platform check such as IS_ATSM or IS_XEHPSDV (or even #define IS_SERVER()) to set min freq to RP0 rather than this -1U value from FW? What if -1U means "FW defaults" and FW starts setting this on client products tomorrow? Also, we need to set gt->defaults.min_freq here. Thanks. -- Ashutosh > + } > +} > + > static int slpc_use_fused_rp0(struct intel_guc_slpc *slpc) > { > /* Force SLPC to used platform rp0 */ > @@ -647,6 +673,9 @@ int intel_guc_slpc_enable(struct intel_guc_slpc *slpc) > > slpc_get_rp_values(slpc); > > + /* Handle the case where min=max=RPmax */ > + update_server_min_softlimit(slpc); > + > /* Set SLPC max limit to RP0 */ > ret = slpc_use_fused_rp0(slpc); > if (unlikely(ret)) { > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc_types.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc_types.h > index 73d208123528..a6ef53b04e04 100644 > --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc_types.h > +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc_types.h > @@ -19,6 +19,9 @@ struct intel_guc_slpc { > bool supported; > bool selected; > > + /* Indicates this is a server part */ > + bool min_is_rpmax; > + > /* platform frequency limits */ > u32 min_freq; > u32 rp0_freq; > -- > 2.35.1 >