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From: "Dixit, Ashutosh" <ashutosh.dixit@intel.com>
To: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: intel-gfx@lists.freedesktop.org,
	Sushma Venkatesh Reddy <sushma.venkatesh.reddy@intel.com>,
	stable@vger.kernel.org
Subject: Re: [Intel-gfx] [PATCH] drm/i915/slpc: Fix PCODE IA Freq requests when using SLPC
Date: Fri, 26 Aug 2022 06:13:44 -0700	[thread overview]
Message-ID: <87h71zjgfr.wl-ashutosh.dixit@intel.com> (raw)
In-Reply-To: <20220826101318.78486-1-rodrigo.vivi@intel.com>

On Fri, 26 Aug 2022 03:13:18 -0700, Rodrigo Vivi wrote:
>
> We need to inform PCODE of a desired ring frequencies so PCODE update
> the memory frequencies to us. rps->min_freq and rps->max_freq are the
> frequencies used in that request. However they were unset when SLPC was
> enabled and PCODE never updated the memory freq.
>
> v2 (as Suggested by Ashutosh): if SLPC is in use, let's pick the right
>    frequencies from the get_ia_constants instead of the fake init of
>    rps' min and max.

Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>

>
> Fixes: 7ba79a671568 ("drm/i915/guc/slpc: Gate Host RPS when SLPC is enabled")
> Cc: <stable@vger.kernel.org> # v5.15+
> Cc: Ashutosh Dixit <ashutosh.dixit@intel.com>
> Tested-by: Sushma Venkatesh Reddy <sushma.venkatesh.reddy@intel.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
>  drivers/gpu/drm/i915/gt/intel_llc.c | 10 ++++++++--
>  1 file changed, 8 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_llc.c b/drivers/gpu/drm/i915/gt/intel_llc.c
> index 14fe65812e42..766f9526da99 100644
> --- a/drivers/gpu/drm/i915/gt/intel_llc.c
> +++ b/drivers/gpu/drm/i915/gt/intel_llc.c
> @@ -49,6 +49,7 @@ static unsigned int cpu_max_MHz(void)
>  static bool get_ia_constants(struct intel_llc *llc,
>			     struct ia_constants *consts)
>  {
> +	struct intel_guc_slpc *slpc = &llc_to_gt(llc)->uc.guc.slpc;
>	struct drm_i915_private *i915 = llc_to_gt(llc)->i915;
>	struct intel_rps *rps = &llc_to_gt(llc)->rps;
>
> @@ -65,8 +66,13 @@ static bool get_ia_constants(struct intel_llc *llc,
>	/* convert DDR frequency from units of 266.6MHz to bandwidth */
>	consts->min_ring_freq = mult_frac(consts->min_ring_freq, 8, 3);
>
> -	consts->min_gpu_freq = rps->min_freq;
> -	consts->max_gpu_freq = rps->max_freq;
> +	if (intel_uc_uses_guc_slpc(&llc_to_gt(llc)->uc)) {
> +		consts->min_gpu_freq = slpc->min_freq;
> +		consts->max_gpu_freq = slpc->rp0_freq;
> +	} else {
> +		consts->min_gpu_freq = rps->min_freq;
> +		consts->max_gpu_freq = rps->max_freq;
> +	}
>	if (GRAPHICS_VER(i915) >= 9) {
>		/* Convert GT frequency to 50 HZ units */
>		consts->min_gpu_freq /= GEN9_FREQ_SCALER;
> --
> 2.37.1
>

WARNING: multiple messages have this Message-ID (diff)
From: "Dixit, Ashutosh" <ashutosh.dixit@intel.com>
To: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: <intel-gfx@lists.freedesktop.org>, <stable@vger.kernel.org>,
	Sushma Venkatesh Reddy <sushma.venkatesh.reddy@intel.com>
Subject: Re: [PATCH] drm/i915/slpc: Fix PCODE IA Freq requests when using SLPC
Date: Fri, 26 Aug 2022 06:13:44 -0700	[thread overview]
Message-ID: <87h71zjgfr.wl-ashutosh.dixit@intel.com> (raw)
In-Reply-To: <20220826101318.78486-1-rodrigo.vivi@intel.com>

On Fri, 26 Aug 2022 03:13:18 -0700, Rodrigo Vivi wrote:
>
> We need to inform PCODE of a desired ring frequencies so PCODE update
> the memory frequencies to us. rps->min_freq and rps->max_freq are the
> frequencies used in that request. However they were unset when SLPC was
> enabled and PCODE never updated the memory freq.
>
> v2 (as Suggested by Ashutosh): if SLPC is in use, let's pick the right
>    frequencies from the get_ia_constants instead of the fake init of
>    rps' min and max.

Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>

>
> Fixes: 7ba79a671568 ("drm/i915/guc/slpc: Gate Host RPS when SLPC is enabled")
> Cc: <stable@vger.kernel.org> # v5.15+
> Cc: Ashutosh Dixit <ashutosh.dixit@intel.com>
> Tested-by: Sushma Venkatesh Reddy <sushma.venkatesh.reddy@intel.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
>  drivers/gpu/drm/i915/gt/intel_llc.c | 10 ++++++++--
>  1 file changed, 8 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_llc.c b/drivers/gpu/drm/i915/gt/intel_llc.c
> index 14fe65812e42..766f9526da99 100644
> --- a/drivers/gpu/drm/i915/gt/intel_llc.c
> +++ b/drivers/gpu/drm/i915/gt/intel_llc.c
> @@ -49,6 +49,7 @@ static unsigned int cpu_max_MHz(void)
>  static bool get_ia_constants(struct intel_llc *llc,
>			     struct ia_constants *consts)
>  {
> +	struct intel_guc_slpc *slpc = &llc_to_gt(llc)->uc.guc.slpc;
>	struct drm_i915_private *i915 = llc_to_gt(llc)->i915;
>	struct intel_rps *rps = &llc_to_gt(llc)->rps;
>
> @@ -65,8 +66,13 @@ static bool get_ia_constants(struct intel_llc *llc,
>	/* convert DDR frequency from units of 266.6MHz to bandwidth */
>	consts->min_ring_freq = mult_frac(consts->min_ring_freq, 8, 3);
>
> -	consts->min_gpu_freq = rps->min_freq;
> -	consts->max_gpu_freq = rps->max_freq;
> +	if (intel_uc_uses_guc_slpc(&llc_to_gt(llc)->uc)) {
> +		consts->min_gpu_freq = slpc->min_freq;
> +		consts->max_gpu_freq = slpc->rp0_freq;
> +	} else {
> +		consts->min_gpu_freq = rps->min_freq;
> +		consts->max_gpu_freq = rps->max_freq;
> +	}
>	if (GRAPHICS_VER(i915) >= 9) {
>		/* Convert GT frequency to 50 HZ units */
>		consts->min_gpu_freq /= GEN9_FREQ_SCALER;
> --
> 2.37.1
>

  reply	other threads:[~2022-08-26 13:14 UTC|newest]

Thread overview: 35+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-08-25 22:23 [Intel-gfx] [PATCH] drm/i915/slpc: Set rps' min and max frequencies even with SLPC Rodrigo Vivi
2022-08-25 22:42 ` Rodrigo Vivi
2022-08-25 23:00 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for " Patchwork
2022-08-25 23:59 ` [Intel-gfx] [PATCH] " Dixit, Ashutosh
2022-08-26  9:28   ` Vivi, Rodrigo
2022-08-26 10:13   ` [Intel-gfx] [PATCH] drm/i915/slpc: Fix PCODE IA Freq requests when using SLPC Rodrigo Vivi
2022-08-26 10:13     ` Rodrigo Vivi
2022-08-26 13:13     ` Dixit, Ashutosh [this message]
2022-08-26 13:13       ` Dixit, Ashutosh
2022-08-26 17:44       ` [Intel-gfx] " Rodrigo Vivi
2022-08-26 17:44         ` Rodrigo Vivi
2022-08-26 20:03         ` [Intel-gfx] " Dixit, Ashutosh
2022-08-26 20:03           ` Dixit, Ashutosh
2022-08-30 15:42           ` [Intel-gfx] " Dixit, Ashutosh
2022-08-30 15:42             ` Dixit, Ashutosh
2022-08-30 19:16             ` [Intel-gfx] [PATCH] drm/i915/slpc: Let's fix the PCODE min freq table setup for SLPC Rodrigo Vivi
2022-08-30 19:16               ` Rodrigo Vivi
2022-08-31  0:45               ` [Intel-gfx] " Dixit, Ashutosh
2022-08-31  0:45                 ` Dixit, Ashutosh
2022-08-31 19:35                 ` [Intel-gfx] " Vivi, Rodrigo
2022-08-31 19:35                   ` Vivi, Rodrigo
2022-08-31 21:45                 ` [Intel-gfx] " Rodrigo Vivi
2022-08-31 21:45                   ` Rodrigo Vivi
2022-08-31 22:17                   ` [Intel-gfx] " Dixit, Ashutosh
2022-08-31 22:17                     ` Dixit, Ashutosh
2022-09-01 16:53                     ` [Intel-gfx] " Rodrigo Vivi
2022-09-01 16:53                       ` Rodrigo Vivi
2022-08-26  0:53 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915/slpc: Set rps' min and max frequencies even with SLPC. (rev2) Patchwork
2022-08-26 11:24 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/slpc: Set rps' min and max frequencies even with SLPC. (rev4) Patchwork
2022-08-26 18:43 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/slpc: Set rps' min and max frequencies even with SLPC. (rev5) Patchwork
2022-08-30 12:55 ` [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/slpc: Set rps' min and max frequencies even with SLPC. (rev4) Patchwork
2022-08-30 19:59 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/slpc: Set rps' min and max frequencies even with SLPC. (rev6) Patchwork
2022-08-31 15:31 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2022-08-31 22:34 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/slpc: Set rps' min and max frequencies even with SLPC. (rev7) Patchwork
2022-09-01 17:34 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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