From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jani Nikula Subject: Re: [PATCH v9 01/11] drm/i915: Use 64-bit division macro Date: Wed, 18 Mar 2020 21:08:45 +0200 Message-ID: <87h7yleb0i.fsf@intel.com> References: <19661821c8eb32291e72ec091c267f915c365c52.1584473399.git.gurus@codeaurora.org> Mime-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8BIT Return-path: Received: from mga09.intel.com ([134.134.136.24]:11075 "EHLO mga09.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726638AbgCRTIx (ORCPT ); Wed, 18 Mar 2020 15:08:53 -0400 In-Reply-To: <19661821c8eb32291e72ec091c267f915c365c52.1584473399.git.gurus@codeaurora.org> Sender: linux-pwm-owner@vger.kernel.org List-Id: linux-pwm@vger.kernel.org To: linux-pwm@vger.kernel.org Cc: Thierry Reding , Uwe =?utf-8?Q?Kleine-K?= =?utf-8?Q?=C3=B6nig?= , Subbaraman Narayanamurthy , linux-kernel@vger.kernel.org, Guru Das Srinagesh , Joonas Lahtinen , David Airlie , Daniel Vetter , Chris Wilson , Ville =?utf-8?B?U3lyasOkbMOk?= , intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, Rodrigo Vivi , Maarten Lankhorst On Tue, 17 Mar 2020, Guru Das Srinagesh wrote: > Since the PWM framework is switching struct pwm_state.duty_cycle's > datatype to u64, prepare for this transition by using DIV_ROUND_UP_ULL > to handle a 64-bit dividend. > > Cc: Jani Nikula > Cc: Joonas Lahtinen > Cc: David Airlie > Cc: Daniel Vetter > Cc: Chris Wilson > Cc: "Ville Syrjälä" > Cc: intel-gfx@lists.freedesktop.org > Cc: dri-devel@lists.freedesktop.org > Cc: Rodrigo Vivi > Cc: Maarten Lankhorst > > Signed-off-by: Guru Das Srinagesh Reviewed-by: Jani Nikula Also ack for merging this via whichever tree you prefer; please let me know if you want me to take this via drm-intel. > --- > drivers/gpu/drm/i915/display/intel_panel.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_panel.c b/drivers/gpu/drm/i915/display/intel_panel.c > index bc14e9c..843cac1 100644 > --- a/drivers/gpu/drm/i915/display/intel_panel.c > +++ b/drivers/gpu/drm/i915/display/intel_panel.c > @@ -1868,7 +1868,7 @@ static int pwm_setup_backlight(struct intel_connector *connector, > > panel->backlight.min = 0; /* 0% */ > panel->backlight.max = 100; /* 100% */ > - panel->backlight.level = DIV_ROUND_UP( > + panel->backlight.level = DIV_ROUND_UP_ULL( > pwm_get_duty_cycle(panel->backlight.pwm) * 100, > CRC_PMIC_PWM_PERIOD_NS); > panel->backlight.enabled = panel->backlight.level != 0; -- Jani Nikula, Intel Open Source Graphics Center From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 60175C5ACD6 for ; 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18 Mar 2020 12:08:52 -0700 IronPort-SDR: 1RER0b8WJ7uU8DuvOk4osBuYh5geyIp5mdkP0hKFt4oJVO/AlYK3IcBZB5ceYDANHUrVwjG6Uo Z88VEin0fhfw== X-IronPort-AV: E=Sophos;i="5.70,568,1574150400"; d="scan'208";a="418055805" Received: from gkern-mobl.ger.corp.intel.com (HELO localhost) ([10.252.54.69]) by orsmga005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Mar 2020 12:08:47 -0700 From: Jani Nikula To: Guru Das Srinagesh , linux-pwm@vger.kernel.org Subject: Re: [PATCH v9 01/11] drm/i915: Use 64-bit division macro In-Reply-To: <19661821c8eb32291e72ec091c267f915c365c52.1584473399.git.gurus@codeaurora.org> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo References: <19661821c8eb32291e72ec091c267f915c365c52.1584473399.git.gurus@codeaurora.org> Date: Wed, 18 Mar 2020 21:08:45 +0200 Message-ID: <87h7yleb0i.fsf@intel.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Guru Das Srinagesh , Uwe =?utf-8?Q?Kleine-K?= =?utf-8?Q?=C3=B6nig?= , David Airlie , intel-gfx@lists.freedesktop.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Thierry Reding , Rodrigo Vivi , Subbaraman Narayanamurthy Content-Type: text/plain; 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18 Mar 2020 12:08:52 -0700 IronPort-SDR: 1RER0b8WJ7uU8DuvOk4osBuYh5geyIp5mdkP0hKFt4oJVO/AlYK3IcBZB5ceYDANHUrVwjG6Uo Z88VEin0fhfw== X-IronPort-AV: E=Sophos;i="5.70,568,1574150400"; d="scan'208";a="418055805" Received: from gkern-mobl.ger.corp.intel.com (HELO localhost) ([10.252.54.69]) by orsmga005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Mar 2020 12:08:47 -0700 From: Jani Nikula To: Guru Das Srinagesh , linux-pwm@vger.kernel.org In-Reply-To: <19661821c8eb32291e72ec091c267f915c365c52.1584473399.git.gurus@codeaurora.org> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo References: <19661821c8eb32291e72ec091c267f915c365c52.1584473399.git.gurus@codeaurora.org> Date: Wed, 18 Mar 2020 21:08:45 +0200 Message-ID: <87h7yleb0i.fsf@intel.com> MIME-Version: 1.0 Subject: Re: [Intel-gfx] [PATCH v9 01/11] drm/i915: Use 64-bit division macro X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Guru Das Srinagesh , Uwe =?utf-8?Q?Kleine-K?= =?utf-8?Q?=C3=B6nig?= , David Airlie , intel-gfx@lists.freedesktop.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Subbaraman Narayanamurthy Content-Type: text/plain; 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d="scan'208";a="418055805" Received: from gkern-mobl.ger.corp.intel.com (HELO localhost) ([10.252.54.69]) by orsmga005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Mar 2020 12:08:47 -0700 From: Jani Nikula To: Guru Das Srinagesh , linux-pwm@vger.kernel.org Cc: Thierry Reding , Uwe =?utf-8?Q?Kleine-K?= =?utf-8?Q?=C3=B6nig?= , Subbaraman Narayanamurthy , linux-kernel@vger.kernel.org, Guru Das Srinagesh , Joonas Lahtinen , David Airlie , Daniel Vetter , Chris Wilson , Ville =?utf-8?B?U3lyasOkbMOk?= , intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, Rodrigo Vivi , Maarten Lankhorst Subject: Re: [PATCH v9 01/11] drm/i915: Use 64-bit division macro In-Reply-To: <19661821c8eb32291e72ec091c267f915c365c52.1584473399.git.gurus@codeaurora.org> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo References: <19661821c8eb32291e72ec091c267f915c365c52.1584473399.git.gurus@codeaurora.org> Date: Wed, 18 Mar 2020 21:08:45 +0200 Message-ID: <87h7yleb0i.fsf@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8BIT Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, 17 Mar 2020, Guru Das Srinagesh wrote: > Since the PWM framework is switching struct pwm_state.duty_cycle's > datatype to u64, prepare for this transition by using DIV_ROUND_UP_ULL > to handle a 64-bit dividend. > > Cc: Jani Nikula > Cc: Joonas Lahtinen > Cc: David Airlie > Cc: Daniel Vetter > Cc: Chris Wilson > Cc: "Ville Syrjälä" > Cc: intel-gfx@lists.freedesktop.org > Cc: dri-devel@lists.freedesktop.org > Cc: Rodrigo Vivi > Cc: Maarten Lankhorst > > Signed-off-by: Guru Das Srinagesh Reviewed-by: Jani Nikula Also ack for merging this via whichever tree you prefer; please let me know if you want me to take this via drm-intel. > --- > drivers/gpu/drm/i915/display/intel_panel.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_panel.c b/drivers/gpu/drm/i915/display/intel_panel.c > index bc14e9c..843cac1 100644 > --- a/drivers/gpu/drm/i915/display/intel_panel.c > +++ b/drivers/gpu/drm/i915/display/intel_panel.c > @@ -1868,7 +1868,7 @@ static int pwm_setup_backlight(struct intel_connector *connector, > > panel->backlight.min = 0; /* 0% */ > panel->backlight.max = 100; /* 100% */ > - panel->backlight.level = DIV_ROUND_UP( > + panel->backlight.level = DIV_ROUND_UP_ULL( > pwm_get_duty_cycle(panel->backlight.pwm) * 100, > CRC_PMIC_PWM_PERIOD_NS); > panel->backlight.enabled = panel->backlight.level != 0; -- Jani Nikula, Intel Open Source Graphics Center