All of lore.kernel.org
 help / color / mirror / Atom feed
From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 2/2] drm/i915: Add WaKBLVECSSemaphoreWaitPoll
Date: Tue, 05 Jun 2018 17:54:23 +0300	[thread overview]
Message-ID: <87h8mhp9ls.fsf@gaia.fi.intel.com> (raw)
In-Reply-To: <152771156713.10784.8585504455687997782@mail.alporthouse.com>

Chris Wilson <chris@chris-wilson.co.uk> writes:

> Quoting Mika Kuoppala (2018-05-30 16:02:06)
>> There is a problem with kbl up to rev E0 where a heavy
>> memory traffic from adjacent engine(s) can cause an engine
>> reset to fail. This traffic can be from normal memory accesses
>> or it can be from heavy polling on a semaphore wait.
>> 
>> To combat the normal traffic, we do our best to idle the adjacent
>> engines, before we ask the engine to prepare for reset. For per
>> engine reset, this will add an unwanted extra latency as we
>> do blanket approach before every reset. In past already have
>> noticed that idling an engine before reset, improves our chances
>> of resetting it, but this only idles the engines we are about to
>> reset, not the adjancent ones.
>
> Unfortunately we don't have a lock on the other engines, so can't
> prevent two resets running in parallel clobbering state on the other.
>
> So what's stopping the failure mode of falling back to resetting all
> engines at once if resetting one fails? Is it a catastrophic failure?

Nothing that I can think of and for this we should just let the full
reset and it's explicit idling to be our backup plan.

And it if ever shows itself as frequent enough to warrant further
work, we should consider doing a full reset right from the start on
the affected hw.

-Mika
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2018-06-05 14:54 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-05-30 15:02 [PATCH 1/2] drm/i915: Cancel reset preparations on failed resets Mika Kuoppala
2018-05-30 15:02 ` [PATCH 2/2] drm/i915: Add WaKBLVECSSemaphoreWaitPoll Mika Kuoppala
2018-05-30 20:19   ` Chris Wilson
2018-06-05 14:54     ` Mika Kuoppala [this message]
2018-06-05 16:01     ` Mika Kuoppala
2018-05-30 15:59 ` [PATCH 1/2] drm/i915: Cancel reset preparations on failed resets Chris Wilson
2018-05-30 17:29 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] " Patchwork
2018-05-30 17:48 ` ✓ Fi.CI.BAT: success " Patchwork
2018-05-30 18:37 ` ✓ Fi.CI.IGT: " Patchwork
  -- strict thread matches above, loose matches on Subject: below --
2018-06-05 16:03 [PATCH 1/2] " Mika Kuoppala
2018-06-05 16:03 ` [PATCH 2/2] drm/i915: Add WaKBLVECSSemaphoreWaitPoll Mika Kuoppala
2018-06-05 16:12   ` Chris Wilson
2018-06-06  8:40     ` Mika Kuoppala
2018-06-06  8:47       ` Chris Wilson
2018-06-07  8:54   ` Joonas Lahtinen
2018-06-08  9:31     ` Mika Kuoppala
2018-06-07 17:24   ` Mika Kuoppala

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=87h8mhp9ls.fsf@gaia.fi.intel.com \
    --to=mika.kuoppala@linux.intel.com \
    --cc=chris@chris-wilson.co.uk \
    --cc=intel-gfx@lists.freedesktop.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.