From mboxrd@z Thu Jan 1 00:00:00 1970 From: Alex =?utf-8?Q?Benn=C3=A9e?= Subject: Re: [PATCH v7 09/11] KVM: arm64: guest debug, HW assisted debug support Date: Fri, 03 Jul 2015 17:07:41 +0100 Message-ID: <87h9plrzqq.fsf@linaro.org> References: <1435775343-20034-1-git-send-email-alex.bennee@linaro.org> <1435775343-20034-10-git-send-email-alex.bennee@linaro.org> <20150702084847.GB3418@arm.com> <87pp4asm6u.fsf@linaro.org> <20150703092323.GA1588@arm.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from localhost (localhost [127.0.0.1]) by mm01.cs.columbia.edu (Postfix) with ESMTP id 4CCCD579A5 for ; Fri, 3 Jul 2015 11:56:26 -0400 (EDT) Received: from mm01.cs.columbia.edu ([127.0.0.1]) by localhost (mm01.cs.columbia.edu [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id J1aiIhXz9APy for ; Fri, 3 Jul 2015 11:56:25 -0400 (EDT) Received: from mail-wg0-f44.google.com (mail-wg0-f44.google.com [74.125.82.44]) by mm01.cs.columbia.edu (Postfix) with ESMTPS id 4ED7A5782A for ; Fri, 3 Jul 2015 11:56:24 -0400 (EDT) Received: by wguu7 with SMTP id u7so91954870wgu.3 for ; Fri, 03 Jul 2015 09:07:44 -0700 (PDT) In-reply-to: <20150703092323.GA1588@arm.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kvmarm-bounces@lists.cs.columbia.edu Sender: kvmarm-bounces@lists.cs.columbia.edu To: Will Deacon Cc: "kvm@vger.kernel.org" , "open list:DOCUMENTATION" , Peter Zijlstra , Catalin Marinas , Ingo Molnar , Lorenzo Pieralisi , Jonathan Corbet , "kvmarm@lists.cs.columbia.edu" , Gleb Natapov , "zhichao.huang@linaro.org" , "jan.kiszka@siemens.com" , "bp@suse.de" , Marc Zyngier , "r65777@freescale.com" , "linux-arm-kernel@lists.infradead.org" , "open list:ABI/API" , open list , "dahi@linux.vnet.ibm.com" , "pbonzini@redhat.com" List-Id: kvmarm@lists.cs.columbia.edu CldpbGwgRGVhY29uIDx3aWxsLmRlYWNvbkBhcm0uY29tPiB3cml0ZXM6Cgo+IEhpIEFsZXgsCj4K PiBPbiBUaHUsIEp1bCAwMiwgMjAxNSBhdCAwMjo1MDozM1BNICswMTAwLCBBbGV4IEJlbm7DqWUg d3JvdGU6Cj4+IEFyZSB5b3UgaGFwcHkgd2l0aCB0aGlzPzoKPgo+IFsuLi5dCj4KPj4gKy8qKgo+ PiArICoga3ZtX2FyY2hfZGV2X2lvY3RsX2NoZWNrX2V4dGVuc2lvbgo+PiArICoKPj4gKyAqIFdl IGN1cnJlbnRseSBhc3N1bWUgdGhhdCB0aGUgbnVtYmVyIG9mIEhXIHJlZ2lzdGVycyBpcyB1bmlm b3JtCj4+ICsgKiBhY3Jvc3MgYWxsIENQVXMgKHNlZSBjcHVpbmZvX3Nhbml0eV9jaGVjaykuCj4+ ICsgKi8KPj4gIGludCBrdm1fYXJjaF9kZXZfaW9jdGxfY2hlY2tfZXh0ZW5zaW9uKGxvbmcgZXh0 KQo+PiAgewo+PiAgICAgICAgIGludCByOwo+PiBAQCAtNjQsNiArNzEsMTIgQEAgaW50IGt2bV9h cmNoX2Rldl9pb2N0bF9jaGVja19leHRlbnNpb24obG9uZyBleHQpCj4+ICAgICAgICAgY2FzZSBL Vk1fQ0FQX0FSTV9FTDFfMzJCSVQ6Cj4+ICAgICAgICAgICAgICAgICByID0gY3B1X2hhc18zMmJp dF9lbDEoKTsKPj4gICAgICAgICAgICAgICAgIGJyZWFrOwo+PiArICAgICAgIGNhc2UgS1ZNX0NB UF9HVUVTVF9ERUJVR19IV19CUFM6Cj4+ICsgICAgICAgICAgICAgICByID0gaHdfYnJlYWtwb2lu dF9zbG90cyhUWVBFX0lOU1QpOwo+PiArICAgICAgICAgICAgICAgYnJlYWs7Cj4+ICsgICAgICAg Y2FzZSBLVk1fQ0FQX0dVRVNUX0RFQlVHX0hXX1dQUzoKPj4gKyAgICAgICAgICAgICAgIHIgID0g aHdfYnJlYWtwb2ludF9zbG90cyhUWVBFX0RBVEEpOwo+PiArICAgICAgICAgICAgICAgYnJlYWs7 Cj4KPiBXaGlsc3QgSSBtdWNoIHByZWZlciB0aGlzIGNvZGUsIGl0IGFjdHVhbGx5IGFkZHMgYW4g dW53YW50ZWQgZGVwZW5kZW5jeQo+IG9uIFBFUkZfRVZFTlRTIHRoYXQgSSBkaWRuJ3QgdGhpbmsg YWJvdXQgdG8gc3RhcnQgd2l0aC4gU29ycnkgdG8ga2VlcAo+IG1lc3NpbmcgeW91IGFib3V0IC0t IEkgZ3Vlc3MgeW91ciBvcmlnaW5hbCBwYXRjaCBpcyB0aGUgYmVzdCB0aGluZyBhZnRlcgo+IGFs bC4KCkV2ZXJ5dGhpbmcgbG9va3MgdG8gYmUgaW4gaHdfYnJlYWtwb2ludC5bY2hdIHdoaWNoIGRv ZXMgZGVwZW5kIG9uCkNPTkZJR19IQVZFX0hXX0JSRUFLUE9JTlQgd2hpY2ggZGVwZW5kcyBvbiBQ RVJGX0VWRU5UUyB0byBiZSBidWlsdC4KSG93ZXZlciB0aGUgcHJldmlvdXMgY29kZSBkZXBlbmRl ZCBvbiB0aGlzIGJlaGF2aW91ciBhcyB3ZWxsLgoKSXQgd291bGQgc2VlbSB3ZWlyZCB0byBlbmFi bGUgZ3Vlc3QgZGVidWcgdXNpbmcgSFcgZGVidWcgcmVnaXN0ZXJzIHRvCmRlYnVnIHRoZSBndWVz dCB5ZXQgbm90IGFsbG93aW5nIHRoZSBob3N0IGtlcm5lbCB0byB1c2UgdGhlbT8gT2YgY291cnNl CnRoaXMgaXMgdGhlIG9ubHkgY29kZSB0aGV5IHdvdWxkIHNoYXJlIGFzIGFsbCB0aGUgbWFnaWMg b2YgZ3Vlc3QKZGVidWdnaW5nIGlzIGFscmVhZHkgbW9zdGx5IHRoZXJlIGZvciBkaXJ0eSBndWVz dCBoYW5kbGluZy4KCkknbSBub3QgZmFtaWxpYXIgd2l0aCBLY29uZmlnIGJ1dCBpdCBsb29rcyBs aWtlIHRoaXMgaXMgYWxsIHBhcnQgb2YKYXJtNjQgZGVmY29uZmlnLiBBcmUgcGVvcGxlIHJlYWxs eSBnb2luZyB0byB3YW50IHRvIGRpc2FibGUgUEVSRl9FVkVOVFMKYnV0IHN0aWxsIGRlYnVnIHRo ZWlyIGd1ZXN0cyB3aXRoIEhXIHN1cHBvcnQ/Cgo+Cj4gV2lsbAoKLS0gCkFsZXggQmVubsOpZQpf X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fXwprdm1hcm0gbWFp bGluZyBsaXN0Cmt2bWFybUBsaXN0cy5jcy5jb2x1bWJpYS5lZHUKaHR0cHM6Ly9saXN0cy5jcy5j b2x1bWJpYS5lZHUvbWFpbG1hbi9saXN0aW5mby9rdm1hcm0K From mboxrd@z Thu Jan 1 00:00:00 1970 From: alex.bennee@linaro.org (Alex =?utf-8?Q?Benn=C3=A9e?=) Date: Fri, 03 Jul 2015 17:07:41 +0100 Subject: [PATCH v7 09/11] KVM: arm64: guest debug, HW assisted debug support In-Reply-To: <20150703092323.GA1588@arm.com> References: <1435775343-20034-1-git-send-email-alex.bennee@linaro.org> <1435775343-20034-10-git-send-email-alex.bennee@linaro.org> <20150702084847.GB3418@arm.com> <87pp4asm6u.fsf@linaro.org> <20150703092323.GA1588@arm.com> Message-ID: <87h9plrzqq.fsf@linaro.org> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Will Deacon writes: > Hi Alex, > > On Thu, Jul 02, 2015 at 02:50:33PM +0100, Alex Benn?e wrote: >> Are you happy with this?: > > [...] > >> +/** >> + * kvm_arch_dev_ioctl_check_extension >> + * >> + * We currently assume that the number of HW registers is uniform >> + * across all CPUs (see cpuinfo_sanity_check). >> + */ >> int kvm_arch_dev_ioctl_check_extension(long ext) >> { >> int r; >> @@ -64,6 +71,12 @@ int kvm_arch_dev_ioctl_check_extension(long ext) >> case KVM_CAP_ARM_EL1_32BIT: >> r = cpu_has_32bit_el1(); >> break; >> + case KVM_CAP_GUEST_DEBUG_HW_BPS: >> + r = hw_breakpoint_slots(TYPE_INST); >> + break; >> + case KVM_CAP_GUEST_DEBUG_HW_WPS: >> + r = hw_breakpoint_slots(TYPE_DATA); >> + break; > > Whilst I much prefer this code, it actually adds an unwanted dependency > on PERF_EVENTS that I didn't think about to start with. Sorry to keep > messing you about -- I guess your original patch is the best thing after > all. Everything looks to be in hw_breakpoint.[ch] which does depend on CONFIG_HAVE_HW_BREAKPOINT which depends on PERF_EVENTS to be built. However the previous code depended on this behaviour as well. It would seem weird to enable guest debug using HW debug registers to debug the guest yet not allowing the host kernel to use them? Of course this is the only code they would share as all the magic of guest debugging is already mostly there for dirty guest handling. I'm not familiar with Kconfig but it looks like this is all part of arm64 defconfig. Are people really going to want to disable PERF_EVENTS but still debug their guests with HW support? > > Will -- Alex Benn?e From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755745AbbGCQHt (ORCPT ); Fri, 3 Jul 2015 12:07:49 -0400 Received: from mail-wg0-f41.google.com ([74.125.82.41]:34098 "EHLO mail-wg0-f41.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755279AbbGCQHp (ORCPT ); Fri, 3 Jul 2015 12:07:45 -0400 References: <1435775343-20034-1-git-send-email-alex.bennee@linaro.org> <1435775343-20034-10-git-send-email-alex.bennee@linaro.org> <20150702084847.GB3418@arm.com> <87pp4asm6u.fsf@linaro.org> <20150703092323.GA1588@arm.com> From: Alex =?utf-8?Q?Benn=C3=A9e?= To: Will Deacon Cc: "kvm@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "kvmarm@lists.cs.columbia.edu" , "christoffer.dall@linaro.org" , Marc Zyngier , "peter.maydell@linaro.org" , "agraf@suse.de" , "drjones@redhat.com" , "pbonzini@redhat.com" , "zhichao.huang@linaro.org" , "jan.kiszka@siemens.com" , "dahi@linux.vnet.ibm.com" , "r65777@freescale.com" , "bp@suse.de" , Gleb Natapov , Jonathan Corbet , Catalin Marinas , Lorenzo Pieralisi , Ingo Molnar , Peter Zijlstra , "open list:DOCUMENTATION" , open list , "open list:ABI/API" Subject: Re: [PATCH v7 09/11] KVM: arm64: guest debug, HW assisted debug support In-reply-to: <20150703092323.GA1588@arm.com> Date: Fri, 03 Jul 2015 17:07:41 +0100 Message-ID: <87h9plrzqq.fsf@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Will Deacon writes: > Hi Alex, > > On Thu, Jul 02, 2015 at 02:50:33PM +0100, Alex Bennée wrote: >> Are you happy with this?: > > [...] > >> +/** >> + * kvm_arch_dev_ioctl_check_extension >> + * >> + * We currently assume that the number of HW registers is uniform >> + * across all CPUs (see cpuinfo_sanity_check). >> + */ >> int kvm_arch_dev_ioctl_check_extension(long ext) >> { >> int r; >> @@ -64,6 +71,12 @@ int kvm_arch_dev_ioctl_check_extension(long ext) >> case KVM_CAP_ARM_EL1_32BIT: >> r = cpu_has_32bit_el1(); >> break; >> + case KVM_CAP_GUEST_DEBUG_HW_BPS: >> + r = hw_breakpoint_slots(TYPE_INST); >> + break; >> + case KVM_CAP_GUEST_DEBUG_HW_WPS: >> + r = hw_breakpoint_slots(TYPE_DATA); >> + break; > > Whilst I much prefer this code, it actually adds an unwanted dependency > on PERF_EVENTS that I didn't think about to start with. Sorry to keep > messing you about -- I guess your original patch is the best thing after > all. Everything looks to be in hw_breakpoint.[ch] which does depend on CONFIG_HAVE_HW_BREAKPOINT which depends on PERF_EVENTS to be built. However the previous code depended on this behaviour as well. It would seem weird to enable guest debug using HW debug registers to debug the guest yet not allowing the host kernel to use them? Of course this is the only code they would share as all the magic of guest debugging is already mostly there for dirty guest handling. I'm not familiar with Kconfig but it looks like this is all part of arm64 defconfig. Are people really going to want to disable PERF_EVENTS but still debug their guests with HW support? > > Will -- Alex Bennée