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From: Jani Nikula <jani.nikula@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 5/5] drm/i915: add bxt gmbus support
Date: Fri, 27 Mar 2015 00:38:08 +0200	[thread overview]
Message-ID: <87h9t7qt9r.fsf@intel.com> (raw)
In-Reply-To: <02a602af8e400d2d9c592a5a6ce82077697a92ac.1427407523.git.jani.nikula@intel.com>

On Fri, 27 Mar 2015, Jani Nikula <jani.nikula@intel.com> wrote:
> From: "A.Sunil Kamath" <sunil.kamath@intel.com>
>
> For BXT gmbus is pulled from GPU to CPU. From implementation point of
> view only pin pair configuration will change. The existing
> implementation supports all platforms previous to GEN8 and also SKL. But
> for BXT pin pair configuration is completely different than SKL or other
> previous GEN's. This patch introduces the new pin pair configuration
> structure specific to BXT and also ensures every real gmbus port has a
> gpio pin.
>
> v3 by Jani: with the platform independent prep work in place, the bxt
> enabling reduces to a fairly trivial patch. Credits are due Sunil for
> giving me the ideas (with his patches) what the platform independent
> parts should look like.

Okay, git fail, this still needs a bxt specific fix in
intel_hdmi_init_connector a bit similar to what chv does there, but too
tired now. x_X

BR,
Jani.


>
> Issue: VIZ-3574
> Signed-off-by: A.Sunil Kamath <sunil.kamath@intel.com>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_reg.h  |  3 +++
>  drivers/gpu/drm/i915/intel_i2c.c | 29 +++++++++++++++++++++++------
>  2 files changed, 26 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index cdc071cff001..b0dc506f2fd1 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -1797,6 +1797,9 @@ enum skl_disp_power_wells {
>  #define   GMBUS_PIN_DPB		5 /* SDVO, HDMIB */
>  #define   GMBUS_PIN_DPD		6 /* HDMID */
>  #define   GMBUS_PIN_RESERVED	7 /* 7 reserved */
> +#define   GMBUS_PIN_1_BXT	1
> +#define   GMBUS_PIN_2_BXT	2
> +#define   GMBUS_PIN_3_BXT	3
>  #define   GMBUS_PIN_MAX		7 /* not inclusive */
>  #define GMBUS1			0x5104 /* command/status */
>  #define   GMBUS_SW_CLR_INT	(1<<31)
> diff --git a/drivers/gpu/drm/i915/intel_i2c.c b/drivers/gpu/drm/i915/intel_i2c.c
> index ec9cc8cf642e..fd9cb6dcb84e 100644
> --- a/drivers/gpu/drm/i915/intel_i2c.c
> +++ b/drivers/gpu/drm/i915/intel_i2c.c
> @@ -49,10 +49,20 @@ static const struct gmbus_pin gmbus_pins[] = {
>  	[GMBUS_PIN_DPD] = { "dpd", GPIOF },
>  };
>  
> +static const struct gmbus_pin gmbus_pins_bxt[] = {
> +	[GMBUS_PIN_1_BXT] = { "dpb", PCH_GPIOB },
> +	[GMBUS_PIN_2_BXT] = { "dpc", PCH_GPIOC },
> +	[GMBUS_PIN_3_BXT] = { "misc", PCH_GPIOD },
> +};
> +
>  bool intel_gmbus_is_valid_pin(struct drm_i915_private *dev_priv,
>  			      unsigned int pin)
>  {
> -	return pin < ARRAY_SIZE(gmbus_pins) && gmbus_pins[pin].reg;
> +	if (IS_BROXTON(dev_priv))
> +		return pin < ARRAY_SIZE(gmbus_pins_bxt) &&
> +			gmbus_pins_bxt[pin].reg;
> +	else
> +		return pin < ARRAY_SIZE(gmbus_pins) && gmbus_pins[pin].reg;
>  }
>  
>  /* Intel GPIO access functions */
> @@ -196,7 +206,10 @@ intel_gpio_setup(struct intel_gmbus *bus, unsigned int pin)
>  
>  	algo = &bus->bit_algo;
>  
> -	bus->gpio_reg = dev_priv->gpio_mmio_base + gmbus_pins[pin].reg;
> +	if (IS_BROXTON(dev_priv))
> +		bus->gpio_reg = gmbus_pins_bxt[pin].reg;
> +	else
> +		bus->gpio_reg = dev_priv->gpio_mmio_base + gmbus_pins[pin].reg;
>  
>  	bus->adapter.algo_data = algo;
>  	algo->setsda = set_data;
> @@ -540,6 +553,8 @@ int intel_setup_gmbus(struct drm_device *dev)
>  	init_waitqueue_head(&dev_priv->gmbus_wait_queue);
>  
>  	for (pin = 0; pin < ARRAY_SIZE(dev_priv->gmbus); pin++) {
> +		const char *name;
> +
>  		if (!intel_gmbus_is_valid_pin(dev_priv, pin))
>  			continue;
>  
> @@ -547,10 +562,12 @@ int intel_setup_gmbus(struct drm_device *dev)
>  
>  		bus->adapter.owner = THIS_MODULE;
>  		bus->adapter.class = I2C_CLASS_DDC;
> -		snprintf(bus->adapter.name,
> -			 sizeof(bus->adapter.name),
> -			 "i915 gmbus %s",
> -			 gmbus_pins[pin].name);
> +		if (IS_BROXTON(dev_priv))
> +			name = gmbus_pins_bxt[pin].name;
> +		else
> +			name = gmbus_pins[pin].name;
> +		snprintf(bus->adapter.name, sizeof(bus->adapter.name),
> +			 "i915 gmbus %s", name);
>  
>  		bus->adapter.dev.parent = &dev->pdev->dev;
>  		bus->dev_priv = dev_priv;
> -- 
> 2.1.4
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Jani Nikula, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2015-03-26 22:39 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-03-26 22:20 [PATCH 0/5] drm/i915: gmbus pin/port cleanup and bxt enabling Jani Nikula
2015-03-26 22:20 ` [PATCH 1/5] drm/i915: rename GMBUS_PORT_* macros as GMBUS_PIN_* Jani Nikula
2015-03-26 22:20 ` [PATCH 2/5] drm/i915: refer to pin instead of port in the intel_i2c.c interfaces Jani Nikula
2015-03-26 22:20 ` [PATCH 3/5] drm/i915: index gmbus tables using the pin pair number Jani Nikula
2015-03-27 15:00   ` Ville Syrjälä
2015-03-27 16:27     ` Jani Nikula
2015-04-01  7:55     ` [PATCH v2] " Jani Nikula
2015-03-26 22:20 ` [PATCH 4/5] drm/i915: base gmbus pin validity check on the gmbus pin map array Jani Nikula
2015-04-01 12:12   ` Daniel Vetter
2015-03-26 22:20 ` [PATCH 5/5] drm/i915: add bxt gmbus support Jani Nikula
2015-03-26 22:38   ` Jani Nikula [this message]
2015-03-27  8:42   ` Daniel Vetter
2015-03-27  8:59   ` [PATCH] " Jani Nikula
2015-03-27  9:00   ` [PATCH v4] " Jani Nikula
2015-04-01  7:58     ` [PATCH v5] " Jani Nikula
2015-04-09 10:33       ` shuang.he
2015-04-09 11:12       ` Imre Deak
2015-03-27 10:05 ` [PATCH 1/2] drm/i915: don't register nonexisting gmbus pins for bdw Jani Nikula
2015-03-27 10:05   ` [PATCH 2/2] drm/i915: don't register nonexisting gmbus pins for skl Jani Nikula

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