Re: [Qemu-devel] [PATCH v1 10/16] target-arm: Break out exception masking to a separate func

["Alex Bennée" <alex.bennee@linaro.org>]

Edgar E. Iglesias writes:

> From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>
>
> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
> ---
>  cpu-exec.c       |  5 ++---
>  target-arm/cpu.h | 16 ++++++++++++++++
>  2 files changed, 18 insertions(+), 3 deletions(-)
>
> diff --git a/cpu-exec.c b/cpu-exec.c
> index 38e5f02..a579ffc 100644
> --- a/cpu-exec.c
> +++ b/cpu-exec.c
> @@ -478,7 +478,7 @@ int cpu_exec(CPUArchState *env)
>                      }
>  #elif defined(TARGET_ARM)
>                      if (interrupt_request & CPU_INTERRUPT_FIQ
> -                        && !(env->daif & PSTATE_F)) {
> +                        && arm_excp_unmasked(cpu, EXCP_FIQ)) {
>                          cpu->exception_index = EXCP_FIQ;
>                          cc->do_interrupt(cpu);
>                          next_tb = 0;
> @@ -493,8 +493,7 @@ int cpu_exec(CPUArchState *env)
>                         We avoid this by disabling interrupts when
>                         pc contains a magic address.  */
>                      if (interrupt_request & CPU_INTERRUPT_HARD
> -                        && ((IS_M(env) && env->regs[15] < 0xfffffff0)
> -                            || !(env->daif & PSTATE_I))) {
> +                        && arm_excp_unmasked(cpu, EXCP_IRQ)) {
>                          cpu->exception_index = EXCP_IRQ;
>                          cc->do_interrupt(cpu);
>                          next_tb = 0;
> diff --git a/target-arm/cpu.h b/target-arm/cpu.h
> index 5c74adc..9eddcc1 100644
> --- a/target-arm/cpu.h
> +++ b/target-arm/cpu.h
> @@ -1130,6 +1130,22 @@ bool write_cpustate_to_list(ARMCPU *cpu);
>  #  define TARGET_VIRT_ADDR_SPACE_BITS 32
>  #endif
>  
> +static inline bool arm_excp_unmasked(CPUState *cs, unsigned int excp_idx)
> +{
> +    CPUARMState *env = cs->env_ptr;
> +
> +    switch (excp_idx) {
> +    case EXCP_FIQ:
> +        return !(env->daif & PSTATE_F);
> +    case EXCP_IRQ:
> +        return ((IS_M(env) && env->regs[15] < 0xfffffff0)
> +                            || !(env->daif & PSTATE_I));
> +    default:
> +        assert(0);

g_assert_not_reached() is clearer about the intent here.

> +        break;
> +    }
> +}
> +
>  static inline CPUARMState *cpu_init(const char *cpu_model)
>  {
>      ARMCPU *cpu = cpu_arm_init(cpu_model);

-- 
Alex Bennée