From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:52399) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WQcoV-0000at-4m for qemu-devel@nongnu.org; Thu, 20 Mar 2014 09:15:20 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WQcoP-0005Yp-Ns for qemu-devel@nongnu.org; Thu, 20 Mar 2014 09:15:14 -0400 Received: from mail-qc0-f176.google.com ([209.85.216.176]:53041) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WQcoP-0005Ye-Kn for qemu-devel@nongnu.org; Thu, 20 Mar 2014 09:15:09 -0400 Received: by mail-qc0-f176.google.com with SMTP id m20so878589qcx.7 for ; Thu, 20 Mar 2014 06:15:09 -0700 (PDT) From: Mike Day In-Reply-To: <1395273809-12809-4-git-send-email-aik@ozlabs.ru> References: <1395273809-12809-1-git-send-email-aik@ozlabs.ru> <1395273809-12809-4-git-send-email-aik@ozlabs.ru> Date: Thu, 20 Mar 2014 09:15:07 -0400 Message-ID: <87ha6troys.fsf@pixel.localdomain> MIME-Version: 1.0 Content-Type: text/plain Subject: Re: [Qemu-devel] [PATCH v5 3/3] spapr_hcall: add address-translation-mode-on-interrupt resource in H_SET_MODE List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Alexey Kardashevskiy , qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, Alexander Graf , Andreas =?utf-8?Q?F=C3=A4rber?= Alexey Kardashevskiy writes: > This adds handling of the RESOURCE_ADDR_TRANS_MODE resource from > the H_SET_MODE, for POWER8 (PowerISA 2.07) only. > > Signed-off-by: Alexey Kardashevskiy Reviewed-by: Mike Day > --- > hw/ppc/spapr_hcall.c | 26 ++++++++++++++++++++++++++ > target-ppc/cpu.h | 2 ++ > 2 files changed, 28 insertions(+) > > diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c > index fc5211b..fb23730 100644 > --- a/hw/ppc/spapr_hcall.c > +++ b/hw/ppc/spapr_hcall.c > @@ -747,6 +747,32 @@ static target_ulong h_set_mode(PowerPCCPU *cpu, sPAPREnvironment *spapr, > default: > ret = H_UNSUPPORTED_FLAG; > } > + } else if (resource == H_SET_MODE_RESOURCE_ADDR_TRANS_MODE) { > + PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu); > + > + if (!(pcc->insns_flags2 & PPC2_ISA207S)) { > + return H_P2; ret = H_P2; goto out; Just a nit to make for easier review. The above would be more consistent. (Even though ret is already initialized to H_P2.) > + } > + if (value1) { > + ret = H_P3; > + goto out; > + } > + if (value2) { > + ret = H_P4; > + goto out; > + } > + switch (mflags) { > + case 0: > + case 2: > + case 3: > + CPU_FOREACH(cs) { > + set_spr(cs, SPR_LPCR, mflags << LPCR_AIL_SH, LPCR_AIL); > + } > + return H_SUCCESS; > + > + default: > + return H_UNSUPPORTED_FLAG; > + } > } > > out: > diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h > index 72cb546..577193a 100644 > --- a/target-ppc/cpu.h > +++ b/target-ppc/cpu.h > @@ -462,6 +462,8 @@ struct ppc_slb_t { > #define MSR_LE 0 /* Little-endian mode 1 hflags */ > > #define LPCR_ILE (1 << (63-38)) > +#define LPCR_AIL 0x01800000 /* Alternate interrupt location */ > +#define LPCR_AIL_SH (63-40) > > #define msr_sf ((env->msr >> MSR_SF) & 1) > #define msr_isf ((env->msr >> MSR_ISF) & 1) > -- > 1.8.4.rc4 > > -- Mike Day | "Endurance is a Virtue"