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Thu, 29 Jan 2026 06:56:44 -0800 (PST) Received: from draig.lan ([185.124.0.126]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-481a5d30f09sm5951065e9.1.2026.01.29.06.56.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Jan 2026 06:56:43 -0800 (PST) Received: from draig (localhost [IPv6:::1]) by draig.lan (Postfix) with ESMTP id DFBD65F878; Thu, 29 Jan 2026 14:56:42 +0000 (GMT) From: =?utf-8?Q?Alex_Benn=C3=A9e?= To: Peter Maydell Cc: qemu-arm@nongnu.org, qemu-devel@nongnu.org, Richard Henderson , Manos Pitsidianakis Subject: Re: [PATCH v2 3/6] target/arm: Handle SME-only CPUs in sve_vqm1_for_el_sm() In-Reply-To: <20260129113455.1283266-4-peter.maydell@linaro.org> (Peter Maydell's message of "Thu, 29 Jan 2026 11:34:52 +0000") References: <20260129113455.1283266-1-peter.maydell@linaro.org> <20260129113455.1283266-4-peter.maydell@linaro.org> User-Agent: mu4e 1.14.0-pre1; emacs 30.1 Date: Thu, 29 Jan 2026 14:56:42 +0000 Message-ID: <87ikck8o2d.fsf@draig.linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Received-SPF: pass client-ip=2a00:1450:4864:20::32c; envelope-from=alex.bennee@linaro.org; helo=mail-wm1-x32c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-arm@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-arm-bounces+qemu-arm=archiver.kernel.org@nongnu.org Sender: qemu-arm-bounces+qemu-arm=archiver.kernel.org@nongnu.org Peter Maydell writes: > In sve_vqm1_for_el_sm(), we implicitly assume that the CPU has SVE: > if called with sm =3D=3D false for non-streaming mode, we try to return a > vector length from svq_vq. This hits the "assert(sm)" at the bettom > of the function in an SME-only CPU where sve_vq.map is zero. > > Add code to handle the "SME-only CPU not in streaming mode" case: we > report an effective VL of 128 bits, which is what the architecture > rule R_KXKNK says should be used when SVE instructions are disabled > or trapped but floating point instructions are enabled. > > Signed-off-by: Peter Maydell Reviewed-by: Alex Benn=C3=A9e --=20 Alex Benn=C3=A9e Virtualisation Tech Lead @ Linaro