RE: [tglx-devel:x86/microcode] [x86/microcode/32] 7f1f6ace4c: BUG:unable_to_handle_page_fault_for_address

[Thomas Gleixner <tglx@linutronix.de>]

On Wed, Aug 30 2023 at 14:04, Qiuxu Zhuo wrote:
>> From: Sang, Oliver <oliver.sang@intel.com>
>> Sent: Tuesday, August 29, 2023 4:00 PM
>> To: Thomas Gleixner <tglx@linutronix.de>
>> ...
>> BUG:unable_to_handle_page_fault_for_address
>> ...
>> [    0.139017][    T0] BUG: unable to handle page fault for address: 027025c4
>> ...
>> [    0.139017][    T0] CR0: 80050033 CR2: 027025c4 CR3: 02cdf000 CR4:
>
> The bit31 of CR0 was set which indicated that the paging was enabled as expected by your patch [1].
>
>> ...
>> [ 0.139017][ T0] EIP: load_ucode_ap
>> (arch/x86/kernel/cpu/microcode/core.c:177
>> arch/x86/kernel/cpu/microcode/core.c:187)
>
> The fault EIP was due to accessing the following memory in the physical address:
>     check_loader_disabled_ap() -> return *((bool *)__pa_nodebug(&dis_ucode_ldr));
>
> Your patch [1] moved the 32-bit early ucode update after paging was enabled.
> So, seems like all the following places need memory access in the virtual address.
>
> I can't reproduce the issue if I apply the following patch.
> Please let me know if you want me to create a separate patch.
>
> [1] 7f1f6ace4ce1 ("x86/microcode/32: Move early loading after paging enable")

Ooops. I completely forgot to reply to this report. I've fixed that up
today in the morning already and pushed out an updated version into that
x86/microcode branch. It's pretty much the same as you did +/- a detail.

Sorry for stealing your time.

Thanks,

        Thomas