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From: Rahul Rameshbabu <rrameshbabu@nvidia.com>
To: Vadim Fedorenko <vadfed@meta.com>
Cc: Saeed Mahameed <saeed@kernel.org>,
	 Jakub Kicinski <kuba@kernel.org>,
	Saeed Mahameed <saeedm@nvidia.com>,
	 Gal Pressman <gal@nvidia.com>,
	 Bar Shapira <bshapira@nvidia.com>,
	 Vadim Fedorenko <vadim.fedorenko@linux.dev>,
	 Richard Cochran <richardcochran@gmail.com>,
	"netdev@vger.kernel.org" <netdev@vger.kernel.org>
Subject: Re: [PATCH net] Revert "net/mlx5: Update cyclecounter shift value to improve ptp free running mode precision"
Date: Mon, 21 Aug 2023 14:44:34 -0700	[thread overview]
Message-ID: <87il98nk8t.fsf@nvidia.com> (raw)
In-Reply-To: <BLAPR15MB3874DB4725CD5B5139DAA868BC1EA@BLAPR15MB3874.namprd15.prod.outlook.com> (Vadim Fedorenko's message of "Mon, 21 Aug 2023 21:37:51 +0000")

On Mon, 21 Aug, 2023 21:37:51 +0000 Vadim Fedorenko <vadfed@meta.com> wrote:
> Hi!
>
> I have tested the diff, looks like it works on both CX4 and CX6 cards I have
> right now. Wasn't able to find CX5 to test it, but I think it's ok to publish it
> and wait for some other users of CX5 to test.

Thanks Vadim. I have tested on CX5 myself, but a CX5 user reached out to
me directly since he was also impacted by the original change. If we
can, getting his feedback would be good.

>
> Best,
> Vadim
>
> ________________________________________
> From: Saeed Mahameed <saeed@kernel.org>
> Sent: 17 August 2023 17:37
> To: Jakub Kicinski
> Cc: Saeed Mahameed; Vadim Fedorenko; Rahul Rameshbabu; Gal Pressman; Bar
> Shapira; Vadim Fedorenko; Richard Cochran; netdev@vger.kernel.org
> Subject: Re: [PATCH net] Revert "net/mlx5: Update cyclecounter shift value to
> improve ptp free running mode precision"
>
> On 16 Aug 19:38, Jakub Kicinski wrote:
>>On Tue, 15 Aug 2023 08:15:07 -0700 Vadim Fedorenko wrote:
>>> From: Vadim Fedorenko <vadim.fedorenko@linux.dev>
>>>
>>> This reverts commit 6a40109275626267ebf413ceda81c64719b5c431.
>>>
>>> There was an assumption in the original commit that all the devices
>>> supported by mlx5 advertise 1GHz as an internal timer frequency.
>>> Apparently at least ConnectX-4 Lx (MCX4431N-GCAN) provides 156.250Mhz
>>> as an internal frequency and the original commit breaks PTP
>>> synchronization on these cards.
>>
>>Hi Saeed, any preference here? Given we're past -rc6 and the small
>>size of the revert it seems like a tempting solution?
>
> Rahul's solution is also very small and already passed review, we will be
> conducting some tests, share the patch with Vadim for testing and I will be
> submitting it early next week.
>

Hi Saeed, I think we can send the patch out whenever you want to. I will
share the patch directly with the individual CX5 user who reached out to
me as well.

--
Thanks,

Rahul Rameshbabu

      reply	other threads:[~2023-08-21 21:44 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-08-15 15:15 [PATCH net] Revert "net/mlx5: Update cyclecounter shift value to improve ptp free running mode precision" Vadim Fedorenko
2023-08-15 16:53 ` Rahul Rameshbabu
2023-08-16 21:57   ` Rahul Rameshbabu
2023-08-17  2:38 ` Jakub Kicinski
2023-08-17 16:37   ` Saeed Mahameed
2023-08-21 21:37     ` Vadim Fedorenko
2023-08-21 21:44       ` Rahul Rameshbabu [this message]

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