From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([209.51.188.92]:40476) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h1wsy-00055y-OW for qemu-devel@nongnu.org; Thu, 07 Mar 2019 12:32:49 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1h1wsy-00018V-2T for qemu-devel@nongnu.org; Thu, 07 Mar 2019 12:32:48 -0500 Received: from mail-wr1-x443.google.com ([2a00:1450:4864:20::443]:46146) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1h1wsx-000186-RL for qemu-devel@nongnu.org; Thu, 07 Mar 2019 12:32:48 -0500 Received: by mail-wr1-x443.google.com with SMTP id i16so18397241wrs.13 for ; Thu, 07 Mar 2019 09:32:47 -0800 (PST) References: <1551978650-23207-1-git-send-email-mateja.marjanovic@rt-rk.com> <1551978650-23207-2-git-send-email-mateja.marjanovic@rt-rk.com> From: Alex =?utf-8?Q?Benn=C3=A9e?= In-reply-to: <1551978650-23207-2-git-send-email-mateja.marjanovic@rt-rk.com> Date: Thu, 07 Mar 2019 17:32:45 +0000 Message-ID: <87imwufv42.fsf@zen.linaroharston> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH] target/mips: Fix minor bug in FPU List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Mateja Marjanovic Cc: qemu-devel@nongnu.org, aurelien@aurel32.net, amarkovic@wavecomp.com, arikalo@wavecomp.com, peter.maydell@linaro.org Mateja Marjanovic writes: > From: Mateja Marjanovic > > Wrong type of NaN was generated by maddf and msubf insturctions > when the arguments were inf, zero, nan or zero, inf, nan > respectively. > > Signed-off-by: Mateja Marjanovic > --- > fpu/softfloat-specialize.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/fpu/softfloat-specialize.h b/fpu/softfloat-specialize.h > index 16c0bcb..647bfbc 100644 > --- a/fpu/softfloat-specialize.h > +++ b/fpu/softfloat-specialize.h > @@ -500,7 +500,7 @@ static int pickNaNMulAdd(FloatClass a_cls, FloatClass= b_cls, FloatClass c_cls, > */ > if (infzero) { > float_raise(float_flag_invalid, status); > - return 3; > + return 2; Hi, This changes the behaviour documented above which says: /* For MIPS, the (inf,zero,qnan) case sets InvalidOp and returns * the default NaN */ So if the behaviour is incorrect please update the comment as well. Bonus points for a reference to the canonical reference document that describes this. -- Alex Benn=C3=A9e