From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/i915: Replace irq_seqno_barrier on hws write with a clflush
Date: Thu, 16 Mar 2017 16:15:35 +0200 [thread overview]
Message-ID: <87inn91f5k.fsf@gaia.fi.intel.com> (raw)
In-Reply-To: <20170314111452.9375-1-chris@chris-wilson.co.uk>
Chris Wilson <chris@chris-wilson.co.uk> writes:
> When manually overwriting the HWS, rather than assume irq_seqno_barrier
> does the right thing, we can explicitly flush the cacheline instead.
> This avoids us calling the engine->irq_seqno_barrier() from an illegal
> context:
>
> [ 1472.651797] BUG: scheduling while atomic: migration/0/11/0x00000002
> [ 1472.651807] Modules linked in: ctr ccm arc4 snd_hda_codec_hdmi bnep rfcomm iwldvm snd_hda_codec_conexant snd_hda_codec_generic snd_hda_intel mac80211 snd_hda_codec snd_hda_core snd_pcm dm_multipath snd_hwdep intel_powerclamp coretemp snd_seq_midi crct10dif_pclmul snd_seq_midi_event crc32_pclmul iwlwifi ghash_clmulni_intel btusb snd_rawmidi btrtl aesni_intel btbcm aes_x86_64 crypto_simd btintel cryptd glue_helper bluetooth snd_seq cfg80211 snd_timer snd_seq_device intel_ips binfmt_misc snd mei_me soundcore mei dm_mirror dm_region_hash dm_log i915 intel_gtt i2c_algo_bit drm_kms_helper cfbfillrect syscopyarea cfbimgblt sysfillrect sysimgblt fb_sys_fops cfbcopyarea prime_numbers e1000e drm ahci libahci
> [ 1472.651897] CPU: 0 PID: 11 Comm: migration/0 Tainted: G U 4.11.0-rc1+ #203
> [ 1472.651899] Hardware name: LENOVO 514328U/514328U, BIOS 6QET44WW (1.14 ) 04/20/2010
> [ 1472.651900] Call Trace:
> [ 1472.651913] dump_stack+0x63/0x90
> [ 1472.651922] __schedule_bug+0x5d/0x6b
> [ 1472.651930] __schedule+0x46a/0x5f0
> [ 1472.651934] schedule+0x38/0x90
> [ 1472.651938] schedule_hrtimeout_range_clock+0x85/0x110
> [ 1472.651945] ? hrtimer_init+0x10/0x10
> [ 1472.651949] schedule_hrtimeout_range+0xe/0x10
> [ 1472.651952] usleep_range+0x4d/0x60
> [ 1472.652037] gen5_seqno_barrier+0x13/0x20 [i915]
> [ 1472.652101] intel_engine_init_global_seqno+0xd7/0x160 [i915]
> [ 1472.652160] __i915_gem_set_wedged_BKL+0xa0/0x180 [i915]
> [ 1472.652166] multi_cpu_stop+0xbb/0xe0
> [ 1472.652170] ? cpu_stop_queue_work+0x90/0x90
> [ 1472.652174] cpu_stopper_thread+0x82/0x110
> [ 1472.652179] smpboot_thread_fn+0x137/0x190
> [ 1472.652184] kthread+0xf7/0x130
> [ 1472.652187] ? sort_range+0x20/0x20
> [ 1472.652191] ? kthread_park+0x90/0x90
> [ 1472.652195] ret_from_fork+0x2c/0x40
>
> Testcase: igt/gem_eio #ilk
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
> ---
> drivers/gpu/drm/i915/intel_engine_cs.c | 3 +--
> drivers/gpu/drm/i915/intel_ringbuffer.h | 4 ++++
> 2 files changed, 5 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c
> index 5663ebab851f..074ecaae6daa 100644
> --- a/drivers/gpu/drm/i915/intel_engine_cs.c
> +++ b/drivers/gpu/drm/i915/intel_engine_cs.c
> @@ -249,8 +249,7 @@ void intel_engine_init_global_seqno(struct intel_engine_cs *engine, u32 seqno)
> }
>
> intel_write_status_page(engine, I915_GEM_HWS_INDEX, seqno);
> - if (engine->irq_seqno_barrier)
> - engine->irq_seqno_barrier(engine);
> + clear_bit(ENGINE_IRQ_BREADCRUMB, &engine->irq_posted);
>
> GEM_BUG_ON(i915_gem_active_isset(&engine->timeline->last_request));
> engine->hangcheck.seqno = seqno;
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
> index 9011ae484bd5..bad5e455e815 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.h
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
> @@ -468,7 +468,11 @@ static inline void
> intel_write_status_page(struct intel_engine_cs *engine,
> int reg, u32 value)
> {
> + mb();
> + clflush(&engine->status_page.page_addr[reg]);
> engine->status_page.page_addr[reg] = value;
> + clflush(&engine->status_page.page_addr[reg]);
> + mb();
> }
>
> /*
> --
> 2.11.0
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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next prev parent reply other threads:[~2017-03-16 14:15 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-03-14 11:14 [PATCH] drm/i915: Replace irq_seqno_barrier on hws write with a clflush Chris Wilson
2017-03-16 14:15 ` Mika Kuoppala [this message]
2017-03-16 14:30 ` Chris Wilson
-- strict thread matches above, loose matches on Subject: below --
2017-03-14 11:38 Chris Wilson
2017-03-14 11:49 ` Chris Wilson
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