diff for duplicates of <87ipo1n0ob.fsf@ti.com> diff --git a/a/1.txt b/N1/1.txt index 4b4a7e6..dc95628 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -34,196 +34,3 @@ will submit to stable as well. Tony, do you think we can still queue this as a fix for v3.1? Kevin - ->From 65740eada5a5552edc01e706af0670218815c048 Mon Sep 17 00:00:00 2001 -From: Paul Walmsley <paul@pwsan.com> -Date: Thu, 6 Oct 2011 15:25:52 -0600 -Subject: [PATCH] ARM: OMAP3: PM: fix I/O wakeup and I/O chain clock control - detection - -The way that we detect which OMAP3 chips support I/O wakeup and -software I/O chain clock control is broken. - -Currently, I/O wakeup is marked as present for all OMAP3 SoCs other -than the AM3505/3517. The TI81xx family of SoCs are at present -considered to be OMAP3 SoCs, but don't support I/O wakeup. To resolve -this, convert the existing blacklist approach to an explicit, -whitelist support, in which only SoCs which are known to support I/O -wakeup are listed. (At present, this only includes OMAP34xx, -OMAP3503, OMAP3515, OMAP3525, OMAP3530, and OMAP36xx.) - -Also, the current code incorrectly detects the presence of a -software-controllable I/O chain clock on several chips that don't -support it. This results in writes to reserved bitfields, unnecessary -delays, and console messages on kernels running on those chips: - - http://www.spinics.net/lists/linux-omap/msg58735.html - -Convert this test to a feature test with a chip-by-chip whitelist. - -Thanks to Dave Hylands <dhylands@gmail.com> for reporting this problem -and doing some testing to help isolate the cause. Thanks to Steve -Sakoman <sakoman@gmail.com> for catching a bug in the first version of -this patch. - -Signed-off-by: Paul Walmsley <paul@pwsan.com> -Cc: Dave Hylands <dhylands@gmail.com> -Cc: Steve Sakoman <sakoman@gmail.com> -Tested-by: Steve Sakoman <sakoman@gmail.com> -[khilman@ti.com: unwrapped printk, removed extra braces around conditional - as suggessted by Russell King.] -Signed-off-by: Kevin Hilman <khilman@ti.com> ---- - arch/arm/mach-omap2/id.c | 6 +++- - arch/arm/mach-omap2/pm34xx.c | 44 +++++++++++++++++--------------- - arch/arm/plat-omap/include/plat/cpu.h | 17 +++++++++--- - 3 files changed, 40 insertions(+), 27 deletions(-) - -diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c -index 37efb86..1c93462 100644 ---- a/arch/arm/mach-omap2/id.c -+++ b/arch/arm/mach-omap2/id.c -@@ -201,8 +201,12 @@ static void __init omap3_check_features(void) - OMAP3_CHECK_FEATURE(status, ISP); - if (cpu_is_omap3630()) - omap_features |= OMAP3_HAS_192MHZ_CLK; -- if (!cpu_is_omap3505() && !cpu_is_omap3517()) -+ if (cpu_is_omap3430() || cpu_is_omap3630()) - omap_features |= OMAP3_HAS_IO_WAKEUP; -+ if (omap_rev() == OMAP3430_REV_ES3_1 || -+ omap_rev() == OMAP3430_REV_ES3_1_2 || -+ cpu_is_omap3630()) -+ omap_features |= OMAP3_HAS_IO_CHAIN_CTRL; - - omap_features |= OMAP3_HAS_SDRC; - -diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c -index 7255d9b..43536b2 100644 ---- a/arch/arm/mach-omap2/pm34xx.c -+++ b/arch/arm/mach-omap2/pm34xx.c -@@ -99,31 +99,28 @@ static void omap3_enable_io_chain(void) - { - int timeout = 0; - -- if (omap_rev() >= OMAP3430_REV_ES3_1) { -- omap2_prm_set_mod_reg_bits(OMAP3430_EN_IO_CHAIN_MASK, WKUP_MOD, -- PM_WKEN); -- /* Do a readback to assure write has been done */ -- omap2_prm_read_mod_reg(WKUP_MOD, PM_WKEN); -- -- while (!(omap2_prm_read_mod_reg(WKUP_MOD, PM_WKEN) & -- OMAP3430_ST_IO_CHAIN_MASK)) { -- timeout++; -- if (timeout > 1000) { -- printk(KERN_ERR "Wake up daisy chain " -- "activation failed.\n"); -- return; -- } -- omap2_prm_set_mod_reg_bits(OMAP3430_ST_IO_CHAIN_MASK, -- WKUP_MOD, PM_WKEN); -+ omap2_prm_set_mod_reg_bits(OMAP3430_EN_IO_CHAIN_MASK, WKUP_MOD, -+ PM_WKEN); -+ /* Do a readback to assure write has been done */ -+ omap2_prm_read_mod_reg(WKUP_MOD, PM_WKEN); -+ -+ while (!(omap2_prm_read_mod_reg(WKUP_MOD, PM_WKEN) & -+ OMAP3430_ST_IO_CHAIN_MASK)) { -+ timeout++; -+ if (timeout > 1000) { -+ printk(KERN_ERR -+ "Wake up daisy chain activation failed.\n"); -+ return; - } -+ omap2_prm_set_mod_reg_bits(OMAP3430_ST_IO_CHAIN_MASK, -+ WKUP_MOD, PM_WKEN); - } - } - - static void omap3_disable_io_chain(void) - { -- if (omap_rev() >= OMAP3430_REV_ES3_1) -- omap2_prm_clear_mod_reg_bits(OMAP3430_EN_IO_CHAIN_MASK, WKUP_MOD, -- PM_WKEN); -+ omap2_prm_clear_mod_reg_bits(OMAP3430_EN_IO_CHAIN_MASK, WKUP_MOD, -+ PM_WKEN); - } - - static void omap3_core_save_context(void) -@@ -376,7 +373,8 @@ void omap_sram_idle(void) - (per_next_state < PWRDM_POWER_ON || - core_next_state < PWRDM_POWER_ON)) { - omap2_prm_set_mod_reg_bits(OMAP3430_EN_IO_MASK, WKUP_MOD, PM_WKEN); -- omap3_enable_io_chain(); -+ if (omap3_has_io_chain_ctrl()) -+ omap3_enable_io_chain(); - } - - /* Block console output in case it is on one of the OMAP UARTs */ -@@ -475,7 +473,8 @@ console_still_active: - core_next_state < PWRDM_POWER_ON)) { - omap2_prm_clear_mod_reg_bits(OMAP3430_EN_IO_MASK, WKUP_MOD, - PM_WKEN); -- omap3_disable_io_chain(); -+ if (omap3_has_io_chain_ctrl()) -+ omap3_disable_io_chain(); - } - - pwrdm_post_transition(); -@@ -870,6 +869,9 @@ static int __init omap3_pm_init(void) - if (!cpu_is_omap34xx()) - return -ENODEV; - -+ if (!omap3_has_io_chain_ctrl()) -+ pr_warning("PM: no software I/O chain control; some wakeups may be lost\n"); -+ - pm_errata_configure(); - - /* XXX prcm_setup_regs needs to be before enabling hw -diff --git a/arch/arm/plat-omap/include/plat/cpu.h b/arch/arm/plat-omap/include/plat/cpu.h -index 67b3d75..3a280aa 100644 ---- a/arch/arm/plat-omap/include/plat/cpu.h -+++ b/arch/arm/plat-omap/include/plat/cpu.h -@@ -477,6 +477,13 @@ void omap2_check_revision(void); - - /* - * Runtime detection of OMAP3 features -+ * -+ * OMAP3_HAS_IO_CHAIN_CTRL: Some later members of the OMAP3 chip -+ * family have OS-level control over the I/O chain clock. This is -+ * to avoid a window during which wakeups could potentially be lost -+ * during powerdomain transitions. If this bit is set, it -+ * indicates that the chip does support OS-level control of this -+ * feature. - */ - extern u32 omap_features; - -@@ -488,9 +495,10 @@ extern u32 omap_features; - #define OMAP3_HAS_192MHZ_CLK BIT(5) - #define OMAP3_HAS_IO_WAKEUP BIT(6) - #define OMAP3_HAS_SDRC BIT(7) --#define OMAP4_HAS_MPU_1GHZ BIT(8) --#define OMAP4_HAS_MPU_1_2GHZ BIT(9) --#define OMAP4_HAS_MPU_1_5GHZ BIT(10) -+#define OMAP3_HAS_IO_CHAIN_CTRL BIT(8) -+#define OMAP4_HAS_MPU_1GHZ BIT(9) -+#define OMAP4_HAS_MPU_1_2GHZ BIT(10) -+#define OMAP4_HAS_MPU_1_5GHZ BIT(11) - - - #define OMAP3_HAS_FEATURE(feat,flag) \ -@@ -507,12 +515,11 @@ OMAP3_HAS_FEATURE(isp, ISP) - OMAP3_HAS_FEATURE(192mhz_clk, 192MHZ_CLK) - OMAP3_HAS_FEATURE(io_wakeup, IO_WAKEUP) - OMAP3_HAS_FEATURE(sdrc, SDRC) -+OMAP3_HAS_FEATURE(io_chain_ctrl, IO_CHAIN_CTRL) - - /* - * Runtime detection of OMAP4 features - */ --extern u32 omap_features; -- - #define OMAP4_HAS_FEATURE(feat, flag) \ - static inline unsigned int omap4_has_ ##feat(void) \ - { \ --- -1.7.6 diff --git a/a/content_digest b/N1/content_digest index e5c8d0d..a4ff8b7 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -3,14 +3,10 @@ "ref\0alpine.DEB.2.00.1110061346570.4611@utopia.booyaka.com\0" "ref\0CAGDS+nmb20E4y2HqBtDN05PK1C1YXjmRvnVAbQkhGpp17s4Zcg@mail.gmail.com\0" "ref\0alpine.DEB.2.00.1110061525240.4611@utopia.booyaka.com\0" - "From\0Kevin Hilman <khilman@ti.com>\0" - "Subject\0Re: [PATCH v3] ARM: OMAP3: PM: fix I/O wakeup and I/O chain clock control detection\0" + "From\0khilman@ti.com (Kevin Hilman)\0" + "Subject\0[PATCH v3] ARM: OMAP3: PM: fix I/O wakeup and I/O chain clock control detection\0" "Date\0Thu, 06 Oct 2011 16:46:28 -0700\0" - "To\0Paul Walmsley <paul@pwsan.com>\0" - "Cc\0Steve Sakoman <sakoman@gmail.com>" - linux-omap@vger.kernel.org - linux-arm-kernel@lists.infradead.org - " dhylands@gmail.com\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "Paul Walmsley <paul@pwsan.com> writes:\n" @@ -48,199 +44,6 @@ "\n" "Tony, do you think we can still queue this as a fix for v3.1?\n" "\n" - "Kevin\n" - "\n" - ">From 65740eada5a5552edc01e706af0670218815c048 Mon Sep 17 00:00:00 2001\n" - "From: Paul Walmsley <paul@pwsan.com>\n" - "Date: Thu, 6 Oct 2011 15:25:52 -0600\n" - "Subject: [PATCH] ARM: OMAP3: PM: fix I/O wakeup and I/O chain clock control\n" - " detection\n" - "\n" - "The way that we detect which OMAP3 chips support I/O wakeup and\n" - "software I/O chain clock control is broken.\n" - "\n" - "Currently, I/O wakeup is marked as present for all OMAP3 SoCs other\n" - "than the AM3505/3517. The TI81xx family of SoCs are at present\n" - "considered to be OMAP3 SoCs, but don't support I/O wakeup. To resolve\n" - "this, convert the existing blacklist approach to an explicit,\n" - "whitelist support, in which only SoCs which are known to support I/O\n" - "wakeup are listed. (At present, this only includes OMAP34xx,\n" - "OMAP3503, OMAP3515, OMAP3525, OMAP3530, and OMAP36xx.)\n" - "\n" - "Also, the current code incorrectly detects the presence of a\n" - "software-controllable I/O chain clock on several chips that don't\n" - "support it. This results in writes to reserved bitfields, unnecessary\n" - "delays, and console messages on kernels running on those chips:\n" - "\n" - " http://www.spinics.net/lists/linux-omap/msg58735.html\n" - "\n" - "Convert this test to a feature test with a chip-by-chip whitelist.\n" - "\n" - "Thanks to Dave Hylands <dhylands@gmail.com> for reporting this problem\n" - "and doing some testing to help isolate the cause. Thanks to Steve\n" - "Sakoman <sakoman@gmail.com> for catching a bug in the first version of\n" - "this patch.\n" - "\n" - "Signed-off-by: Paul Walmsley <paul@pwsan.com>\n" - "Cc: Dave Hylands <dhylands@gmail.com>\n" - "Cc: Steve Sakoman <sakoman@gmail.com>\n" - "Tested-by: Steve Sakoman <sakoman@gmail.com>\n" - "[khilman@ti.com: unwrapped printk, removed extra braces around conditional\n" - " as suggessted by Russell King.]\n" - "Signed-off-by: Kevin Hilman <khilman@ti.com>\n" - "---\n" - " arch/arm/mach-omap2/id.c | 6 +++-\n" - " arch/arm/mach-omap2/pm34xx.c | 44 +++++++++++++++++---------------\n" - " arch/arm/plat-omap/include/plat/cpu.h | 17 +++++++++---\n" - " 3 files changed, 40 insertions(+), 27 deletions(-)\n" - "\n" - "diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c\n" - "index 37efb86..1c93462 100644\n" - "--- a/arch/arm/mach-omap2/id.c\n" - "+++ b/arch/arm/mach-omap2/id.c\n" - "@@ -201,8 +201,12 @@ static void __init omap3_check_features(void)\n" - " \tOMAP3_CHECK_FEATURE(status, ISP);\n" - " \tif (cpu_is_omap3630())\n" - " \t\tomap_features |= OMAP3_HAS_192MHZ_CLK;\n" - "-\tif (!cpu_is_omap3505() && !cpu_is_omap3517())\n" - "+\tif (cpu_is_omap3430() || cpu_is_omap3630())\n" - " \t\tomap_features |= OMAP3_HAS_IO_WAKEUP;\n" - "+\tif (omap_rev() == OMAP3430_REV_ES3_1 ||\n" - "+\t omap_rev() == OMAP3430_REV_ES3_1_2 ||\n" - "+\t cpu_is_omap3630())\n" - "+\t\tomap_features |= OMAP3_HAS_IO_CHAIN_CTRL;\n" - " \n" - " \tomap_features |= OMAP3_HAS_SDRC;\n" - " \n" - "diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c\n" - "index 7255d9b..43536b2 100644\n" - "--- a/arch/arm/mach-omap2/pm34xx.c\n" - "+++ b/arch/arm/mach-omap2/pm34xx.c\n" - "@@ -99,31 +99,28 @@ static void omap3_enable_io_chain(void)\n" - " {\n" - " \tint timeout = 0;\n" - " \n" - "-\tif (omap_rev() >= OMAP3430_REV_ES3_1) {\n" - "-\t\tomap2_prm_set_mod_reg_bits(OMAP3430_EN_IO_CHAIN_MASK, WKUP_MOD,\n" - "-\t\t\t\t PM_WKEN);\n" - "-\t\t/* Do a readback to assure write has been done */\n" - "-\t\tomap2_prm_read_mod_reg(WKUP_MOD, PM_WKEN);\n" - "-\n" - "-\t\twhile (!(omap2_prm_read_mod_reg(WKUP_MOD, PM_WKEN) &\n" - "-\t\t\t OMAP3430_ST_IO_CHAIN_MASK)) {\n" - "-\t\t\ttimeout++;\n" - "-\t\t\tif (timeout > 1000) {\n" - "-\t\t\t\tprintk(KERN_ERR \"Wake up daisy chain \"\n" - "-\t\t\t\t \"activation failed.\\n\");\n" - "-\t\t\t\treturn;\n" - "-\t\t\t}\n" - "-\t\t\tomap2_prm_set_mod_reg_bits(OMAP3430_ST_IO_CHAIN_MASK,\n" - "-\t\t\t\t\t WKUP_MOD, PM_WKEN);\n" - "+\tomap2_prm_set_mod_reg_bits(OMAP3430_EN_IO_CHAIN_MASK, WKUP_MOD,\n" - "+\t\t\t\t PM_WKEN);\n" - "+\t/* Do a readback to assure write has been done */\n" - "+\tomap2_prm_read_mod_reg(WKUP_MOD, PM_WKEN);\n" - "+\n" - "+\twhile (!(omap2_prm_read_mod_reg(WKUP_MOD, PM_WKEN) &\n" - "+\t\t OMAP3430_ST_IO_CHAIN_MASK)) {\n" - "+\t\ttimeout++;\n" - "+\t\tif (timeout > 1000) {\n" - "+\t\t\tprintk(KERN_ERR\n" - "+\t\t\t \"Wake up daisy chain activation failed.\\n\");\n" - "+\t\t\treturn;\n" - " \t\t}\n" - "+\t\tomap2_prm_set_mod_reg_bits(OMAP3430_ST_IO_CHAIN_MASK,\n" - "+\t\t\t\t\t WKUP_MOD, PM_WKEN);\n" - " \t}\n" - " }\n" - " \n" - " static void omap3_disable_io_chain(void)\n" - " {\n" - "-\tif (omap_rev() >= OMAP3430_REV_ES3_1)\n" - "-\t\tomap2_prm_clear_mod_reg_bits(OMAP3430_EN_IO_CHAIN_MASK, WKUP_MOD,\n" - "-\t\t\t\t PM_WKEN);\n" - "+\tomap2_prm_clear_mod_reg_bits(OMAP3430_EN_IO_CHAIN_MASK, WKUP_MOD,\n" - "+\t\t\t\t PM_WKEN);\n" - " }\n" - " \n" - " static void omap3_core_save_context(void)\n" - "@@ -376,7 +373,8 @@ void omap_sram_idle(void)\n" - " \t (per_next_state < PWRDM_POWER_ON ||\n" - " \t core_next_state < PWRDM_POWER_ON)) {\n" - " \t\tomap2_prm_set_mod_reg_bits(OMAP3430_EN_IO_MASK, WKUP_MOD, PM_WKEN);\n" - "-\t\tomap3_enable_io_chain();\n" - "+\t\tif (omap3_has_io_chain_ctrl())\n" - "+\t\t\tomap3_enable_io_chain();\n" - " \t}\n" - " \n" - " \t/* Block console output in case it is on one of the OMAP UARTs */\n" - "@@ -475,7 +473,8 @@ console_still_active:\n" - " \t core_next_state < PWRDM_POWER_ON)) {\n" - " \t\tomap2_prm_clear_mod_reg_bits(OMAP3430_EN_IO_MASK, WKUP_MOD,\n" - " \t\t\t\t\t PM_WKEN);\n" - "-\t\tomap3_disable_io_chain();\n" - "+\t\tif (omap3_has_io_chain_ctrl())\n" - "+\t\t\tomap3_disable_io_chain();\n" - " \t}\n" - " \n" - " \tpwrdm_post_transition();\n" - "@@ -870,6 +869,9 @@ static int __init omap3_pm_init(void)\n" - " \tif (!cpu_is_omap34xx())\n" - " \t\treturn -ENODEV;\n" - " \n" - "+\tif (!omap3_has_io_chain_ctrl())\n" - "+\t\tpr_warning(\"PM: no software I/O chain control; some wakeups may be lost\\n\");\n" - "+\n" - " \tpm_errata_configure();\n" - " \n" - " \t/* XXX prcm_setup_regs needs to be before enabling hw\n" - "diff --git a/arch/arm/plat-omap/include/plat/cpu.h b/arch/arm/plat-omap/include/plat/cpu.h\n" - "index 67b3d75..3a280aa 100644\n" - "--- a/arch/arm/plat-omap/include/plat/cpu.h\n" - "+++ b/arch/arm/plat-omap/include/plat/cpu.h\n" - "@@ -477,6 +477,13 @@ void omap2_check_revision(void);\n" - " \n" - " /*\n" - " * Runtime detection of OMAP3 features\n" - "+ *\n" - "+ * OMAP3_HAS_IO_CHAIN_CTRL: Some later members of the OMAP3 chip\n" - "+ * family have OS-level control over the I/O chain clock. This is\n" - "+ * to avoid a window during which wakeups could potentially be lost\n" - "+ * during powerdomain transitions. If this bit is set, it\n" - "+ * indicates that the chip does support OS-level control of this\n" - "+ * feature.\n" - " */\n" - " extern u32 omap_features;\n" - " \n" - "@@ -488,9 +495,10 @@ extern u32 omap_features;\n" - " #define OMAP3_HAS_192MHZ_CLK\t\tBIT(5)\n" - " #define OMAP3_HAS_IO_WAKEUP\t\tBIT(6)\n" - " #define OMAP3_HAS_SDRC\t\t\tBIT(7)\n" - "-#define OMAP4_HAS_MPU_1GHZ\t\tBIT(8)\n" - "-#define OMAP4_HAS_MPU_1_2GHZ\t\tBIT(9)\n" - "-#define OMAP4_HAS_MPU_1_5GHZ\t\tBIT(10)\n" - "+#define OMAP3_HAS_IO_CHAIN_CTRL\t\tBIT(8)\n" - "+#define OMAP4_HAS_MPU_1GHZ\t\tBIT(9)\n" - "+#define OMAP4_HAS_MPU_1_2GHZ\t\tBIT(10)\n" - "+#define OMAP4_HAS_MPU_1_5GHZ\t\tBIT(11)\n" - " \n" - " \n" - " #define OMAP3_HAS_FEATURE(feat,flag)\t\t\t\\\n" - "@@ -507,12 +515,11 @@ OMAP3_HAS_FEATURE(isp, ISP)\n" - " OMAP3_HAS_FEATURE(192mhz_clk, 192MHZ_CLK)\n" - " OMAP3_HAS_FEATURE(io_wakeup, IO_WAKEUP)\n" - " OMAP3_HAS_FEATURE(sdrc, SDRC)\n" - "+OMAP3_HAS_FEATURE(io_chain_ctrl, IO_CHAIN_CTRL)\n" - " \n" - " /*\n" - " * Runtime detection of OMAP4 features\n" - " */\n" - "-extern u32 omap_features;\n" - "-\n" - " #define OMAP4_HAS_FEATURE(feat, flag)\t\t\t\\\n" - " static inline unsigned int omap4_has_ ##feat(void)\t\\\n" - " {\t\t\t\t\t\t\t\\\n" - "-- \n" - 1.7.6 + Kevin -4e398693f9bf6b9e3e9b897ce7021591b43eb82640ae3d43781800ac1d4c83a0 +3d16a7467a7a052b294e1a22180f644bf323d77ed54dbea142d796c13d164a3b
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