From: "Alex Bennée" <alex.bennee@linaro.org>
To: Florian Hofhammer <florian.hofhammer@epfl.ch>
Cc: Pierrick Bouvier <pierrick.bouvier@linaro.org>,
qemu-devel@nongnu.org, richard.henderson@linaro.org,
laurent@vivier.eu, imp@bsdimp.com, berrange@redhat.com
Subject: Re: [PATCH v4 2/7] linux-user: make syscall emulation interruptible
Date: Wed, 25 Feb 2026 12:25:42 +0000 [thread overview]
Message-ID: <87jyw1103d.fsf@draig.linaro.org> (raw)
In-Reply-To: <ef465a2b-d790-406e-a1fa-a7a5f95c18eb@epfl.ch> (Florian Hofhammer's message of "Wed, 25 Feb 2026 10:29:03 +0100")
Florian Hofhammer <florian.hofhammer@epfl.ch> writes:
> On 25/02/2026 10:25, Alex Bennée wrote:
>> Pierrick Bouvier <pierrick.bouvier@linaro.org> writes:
>>
>>> On 2/24/26 7:50 AM, Florian Hofhammer wrote:
>>>> The syscall emulation code previously wasn't interruptible via
>>>> cpu_loop_exit(), as this construct relies on a longjmp target that is not
>>>> live anymore in the syscall handling code. Consequently, longjmp() would
>>>> operate on a (potentially overwritten) stale jump buffer. This patch adds an additional
>>>> setjmp and the necessary handling around it to make longjmp() (and by
>>>> proxy cpu_loop_exit() safe to call even within a syscall context.
>>>> Signed-off-by: Florian Hofhammer <florian.hofhammer@epfl.ch>
>>>> ---
>>>> linux-user/aarch64/cpu_loop.c | 2 +-
>>>> linux-user/alpha/cpu_loop.c | 2 +-
>>>> linux-user/arm/cpu_loop.c | 2 +-
>>>> linux-user/hexagon/cpu_loop.c | 2 +-
>>>> linux-user/hppa/cpu_loop.c | 4 ++++
>>>> linux-user/i386/cpu_loop.c | 8 +++++---
>>>> linux-user/include/special-errno.h | 8 ++++++++
>>>> linux-user/loongarch64/cpu_loop.c | 5 +++--
>>>> linux-user/m68k/cpu_loop.c | 2 +-
>>>> linux-user/microblaze/cpu_loop.c | 2 +-
>>>> linux-user/mips/cpu_loop.c | 5 +++--
>>>> linux-user/or1k/cpu_loop.c | 2 +-
>>>> linux-user/ppc/cpu_loop.c | 6 ++++--
>>>> linux-user/riscv/cpu_loop.c | 2 +-
>>>> linux-user/s390x/cpu_loop.c | 2 +-
>>>> linux-user/sh4/cpu_loop.c | 2 +-
>>>> linux-user/sparc/cpu_loop.c | 4 +++-
>>>> linux-user/syscall.c | 16 ++++++++++++++++
>>>> linux-user/xtensa/cpu_loop.c | 3 +++
>>>> 19 files changed, 59 insertions(+), 20 deletions(-)
>>>> diff --git a/linux-user/sparc/cpu_loop.c
>>>> b/linux-user/sparc/cpu_loop.c
>>>> index 7391e2add8..f054316dce 100644
>>>> --- a/linux-user/sparc/cpu_loop.c
>>>> +++ b/linux-user/sparc/cpu_loop.c
>>>> @@ -229,7 +229,9 @@ void cpu_loop (CPUSPARCState *env)
>>>> env->regwptr[2], env->regwptr[3],
>>>> env->regwptr[4], env->regwptr[5],
>>>> 0, 0);
>>>> - if (ret == -QEMU_ERESTARTSYS || ret == -QEMU_ESIGRETURN) {
>>>> + if (ret == -QEMU_ERESTARTSYS
>>>> + || ret == -QEMU_ESIGRETURN
>>>> + || ret == -QEMU_ESETPC) {
>>>> break;
>>>> }
>>>
>>> Just a style nit:
>>> if (ret == -QEMU_ERESTARTSYS ||
>>> ret == -QEMU_ESIGRETURN ||
>>> ret == -QEMU_ESETPC) {
>>
>> I was hopping the ret test could be wrapped up into a helper but it
>> seems sparc and x86 have enough variation in handled ret codes to make
>> that difficult.
>
> It's not just x86 and sparc, there generally seems to not be consensus
> on whether return codes are checked via a single conditional check (as
> is the case with sparc), dedicated conditional checks for each possible
> error value, or via switch statements. I think moving that into a helper
> would require a bit of refactoring across architectures.
> I could check that out for a follow-up patch set if you think this makes
> sense.
I think we can live with it for now:
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
>
> Best regards,
> Florian
--
Alex Bennée
Virtualisation Tech Lead @ Linaro
next prev parent reply other threads:[~2026-02-25 12:26 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-02-24 15:46 [PATCH v4 0/7] Enable PC diversion via the plugin API Florian Hofhammer
2026-02-24 15:48 ` [PATCH v4 1/7] plugins: add flag to specify whether PC is rw Florian Hofhammer
2026-02-24 17:41 ` Alex Bennée
2026-02-24 15:50 ` [PATCH v4 2/7] linux-user: make syscall emulation interruptible Florian Hofhammer
2026-02-24 21:05 ` Pierrick Bouvier
2026-02-25 8:02 ` Florian Hofhammer
2026-02-25 17:00 ` Pierrick Bouvier
2026-02-25 9:25 ` Alex Bennée
2026-02-25 9:29 ` Florian Hofhammer
2026-02-25 12:25 ` Alex Bennée [this message]
2026-02-24 15:51 ` [PATCH v4 3/7] plugins: add PC diversion API function Florian Hofhammer
2026-02-24 17:46 ` Alex Bennée
2026-02-24 20:12 ` Pierrick Bouvier
2026-02-25 7:55 ` Florian Hofhammer
2026-02-24 15:52 ` [PATCH v4 4/7] tests/tcg: add test for qemu_plugin_set_pc API Florian Hofhammer
2026-02-24 16:55 ` Brian Cain
2026-02-24 20:24 ` Pierrick Bouvier
2026-02-25 14:58 ` Florian Hofhammer
2026-02-25 17:04 ` Pierrick Bouvier
2026-02-26 8:08 ` Florian Hofhammer
2026-02-24 20:35 ` Pierrick Bouvier
2026-02-25 7:59 ` Florian Hofhammer
2026-02-25 11:49 ` Florian Hofhammer
2026-02-25 17:07 ` Pierrick Bouvier
2026-02-25 17:09 ` Pierrick Bouvier
2026-02-24 21:28 ` Pierrick Bouvier
2026-02-25 8:03 ` Florian Hofhammer
2026-02-25 16:21 ` Florian Hofhammer
2026-02-25 17:30 ` Pierrick Bouvier
2026-02-25 17:39 ` Pierrick Bouvier
2026-02-26 8:30 ` Florian Hofhammer
2026-02-26 19:47 ` Pierrick Bouvier
2026-02-24 15:53 ` [PATCH v4 5/7] plugins: add read-only property for registers Florian Hofhammer
2026-02-24 17:46 ` Alex Bennée
2026-02-26 11:55 ` Florian Hofhammer
2026-02-26 14:33 ` Alex Bennée
2026-02-26 19:43 ` Pierrick Bouvier
2026-02-24 15:57 ` [PATCH v4 6/7] plugins: prohibit writing to read-only registers Florian Hofhammer
2026-02-24 17:49 ` Alex Bennée
2026-03-02 11:52 ` Florian Hofhammer
2026-03-02 13:03 ` Alex Bennée
2026-03-02 13:06 ` Florian Hofhammer
2026-02-24 15:58 ` [PATCH v4 7/7] tests/tcg/plugins: test register readonly feature Florian Hofhammer
2026-02-24 20:17 ` Pierrick Bouvier
2026-02-25 9:24 ` Alex Bennée
2026-02-24 20:14 ` [PATCH v4 0/7] Enable PC diversion via the plugin API Pierrick Bouvier
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