From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 99F89C25B7C for ; Tue, 28 May 2024 09:49:45 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C166D10E217; Tue, 28 May 2024 09:49:44 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="G4pyT+Tr"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.17]) by gabe.freedesktop.org (Postfix) with ESMTPS id 0607D10E16F for ; Tue, 28 May 2024 09:49:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1716889783; x=1748425783; h=from:to:cc:subject:in-reply-to:references:date: message-id:mime-version; bh=kKNdPrXBs248o2fOS6H42IgVM04Qi2Eg0QV+4678m6w=; b=G4pyT+TrET/7UT9w10Rs7IYpiUET0ezytB6iCpfh2GNFcUMcLDQdEsMB 0QD90cn0WDBsVi7rGXu9yC+mMzs3EDMDs48Ydyx+BX49+LxbQOQ/TY8rl zLfqF/lZaSv7zb/DOLf9IMN028If0pjH+XgAdYLFVnR67wEEytMUmupT6 Kf18J7ecIPiK0p65yIlJ+5QKHsbqcnRthkGaZFtxmphjHs2QSXzOpzMyL YqkhcQHMUDrowMdRVnNUZawGEUVNcITlEgndtUXwDy1S41hnwFJPV2Csc kxjkUy6Zt4uJEXWSaQE8dqRspHRD8lHJp9ZouSYr12JLgiqZBzTesQYso w==; X-CSE-ConnectionGUID: OpEHPl+lRpCCgcruR9SKjQ== X-CSE-MsgGUID: lnpKGUFvQqeqi7SsWm+hKA== X-IronPort-AV: E=McAfee;i="6600,9927,11085"; a="13353638" X-IronPort-AV: E=Sophos;i="6.08,194,1712646000"; d="scan'208";a="13353638" Received: from fmviesa008.fm.intel.com ([10.60.135.148]) by orvoesa109.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 May 2024 02:49:43 -0700 X-CSE-ConnectionGUID: 2XRRF45TSfW8+RClwPqnOw== X-CSE-MsgGUID: HvUFs3gCSAayFOV3TAtoNg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,194,1712646000"; d="scan'208";a="35006752" Received: from bergbenj-mobl1.ger.corp.intel.com (HELO localhost) ([10.245.246.13]) by fmviesa008-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 May 2024 02:49:40 -0700 From: Jani Nikula To: Vinod Govindapillai , intel-gfx@lists.freedesktop.org Cc: vinod.govindapillai@intel.com, ville.syrjala@intel.com Subject: Re: [PATCH] drm/i915/display: update handling of FBC when VT-d active workaround In-Reply-To: <20240528094800.104050-1-vinod.govindapillai@intel.com> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo References: <20240528094800.104050-1-vinod.govindapillai@intel.com> Date: Tue, 28 May 2024 12:49:37 +0300 Message-ID: <87jzjel0zy.fsf@intel.com> MIME-Version: 1.0 Content-Type: text/plain X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On Tue, 28 May 2024, Vinod Govindapillai wrote: > Move the handling of the disabling FBC when VT-d is active wa > as part of the intel_fbc_check_plane() I can see that from the code. The commit message must answer the question "why". BR, Jani. > > Bspec: 21664 > Signed-off-by: Vinod Govindapillai > --- > drivers/gpu/drm/i915/display/intel_fbc.c | 22 ++++++---------------- > 1 file changed, 6 insertions(+), 16 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c > index e9189a864f69..492dc26ecfa2 100644 > --- a/drivers/gpu/drm/i915/display/intel_fbc.c > +++ b/drivers/gpu/drm/i915/display/intel_fbc.c > @@ -1235,6 +1235,12 @@ static int intel_fbc_check_plane(struct intel_atomic_state *state, > return 0; > } > > + /* WaFbcTurnOffFbcWhenHyperVisorIsUsed:skl,bxt */ > + if (i915_vtd_active(i915) && (IS_SKYLAKE(i915) || IS_BROXTON(i915))) { > + plane_state->no_fbc_reason = "VT-d enabled"; > + return true; > + } > + > crtc_state = intel_atomic_get_new_crtc_state(state, crtc); > > if (crtc_state->hw.adjusted_mode.flags & DRM_MODE_FLAG_INTERLACE) { > @@ -1820,19 +1826,6 @@ static int intel_sanitize_fbc_option(struct drm_i915_private *i915) > return 0; > } > > -static bool need_fbc_vtd_wa(struct drm_i915_private *i915) > -{ > - /* WaFbcTurnOffFbcWhenHyperVisorIsUsed:skl,bxt */ > - if (i915_vtd_active(i915) && > - (IS_SKYLAKE(i915) || IS_BROXTON(i915))) { > - drm_info(&i915->drm, > - "Disabling framebuffer compression (FBC) to prevent screen flicker with VT-d enabled\n"); > - return true; > - } > - > - return false; > -} > - > void intel_fbc_add_plane(struct intel_fbc *fbc, struct intel_plane *plane) > { > plane->fbc = fbc; > @@ -1878,9 +1871,6 @@ void intel_fbc_init(struct drm_i915_private *i915) > { > enum intel_fbc_id fbc_id; > > - if (need_fbc_vtd_wa(i915)) > - DISPLAY_RUNTIME_INFO(i915)->fbc_mask = 0; > - > i915->display.params.enable_fbc = intel_sanitize_fbc_option(i915); > drm_dbg_kms(&i915->drm, "Sanitized enable_fbc value: %d\n", > i915->display.params.enable_fbc); -- Jani Nikula, Intel