From: Jani Nikula <jani.nikula@linux.intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>,
intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 07/13] drm/i915: Clear the dpll_hw_state when disabling a pipe
Date: Mon, 28 Mar 2022 14:06:03 +0300 [thread overview]
Message-ID: <87k0cefias.fsf@intel.com> (raw)
In-Reply-To: <20220325123205.22140-8-ville.syrjala@linux.intel.com>
On Fri, 25 Mar 2022, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Clear the dpll_hw_state when we're about disable the pipe.
> Previously it looks like we just left the old junk in there.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_dpll.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dpll.c b/drivers/gpu/drm/i915/display/intel_dpll.c
> index 494a343850e7..7960f1d52eaa 100644
> --- a/drivers/gpu/drm/i915/display/intel_dpll.c
> +++ b/drivers/gpu/drm/i915/display/intel_dpll.c
> @@ -1406,12 +1406,12 @@ int intel_dpll_crtc_compute_clock(struct intel_atomic_state *state,
> if (drm_WARN_ON(&i915->drm, crtc_state->shared_dpll))
> return 0;
>
> - if (!crtc_state->hw.enable)
> - return 0;
> -
> memset(&crtc_state->dpll_hw_state, 0,
> sizeof(crtc_state->dpll_hw_state));
>
> + if (!crtc_state->hw.enable)
> + return 0;
> +
> return i915->dpll_funcs->crtc_compute_clock(state, crtc);
> }
--
Jani Nikula, Intel Open Source Graphics Center
next prev parent reply other threads:[~2022-03-28 11:06 UTC|newest]
Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-25 12:31 [Intel-gfx] [PATCH 00/13] drm/i915: Start reordering modeset clock calculations Ville Syrjala
2022-03-25 12:31 ` [Intel-gfx] [PATCH 01/13] drm/i915: Make .get_dplls() return int Ville Syrjala
2022-03-28 10:57 ` Jani Nikula
2022-03-25 12:31 ` [Intel-gfx] [PATCH 02/13] drm/i915: Pass dev_priv to intel_shared_dpll_init() Ville Syrjala
2022-03-28 10:57 ` Jani Nikula
2022-03-25 12:31 ` [Intel-gfx] [PATCH 03/13] drm/i915: Remove pointless dpll_funcs checks Ville Syrjala
2022-03-28 10:59 ` Jani Nikula
2022-03-25 12:31 ` [Intel-gfx] [PATCH 04/13] drm/i915: Adjust .crtc_compute_clock() calling convention Ville Syrjala
2022-03-28 11:01 ` Jani Nikula
2022-03-25 12:31 ` [Intel-gfx] [PATCH 05/13] drm/i915: Move stuff into intel_dpll_crtc_compute_clock() Ville Syrjala
2022-03-28 11:02 ` Jani Nikula
2022-03-25 12:31 ` [Intel-gfx] [PATCH 06/13] drm/i915: Move the dpll_hw_state clearing to intel_dpll_crtc_compute_clock() Ville Syrjala
2022-03-28 11:05 ` Jani Nikula
2022-03-25 12:31 ` [Intel-gfx] [PATCH 07/13] drm/i915: Clear the dpll_hw_state when disabling a pipe Ville Syrjala
2022-03-28 11:06 ` Jani Nikula [this message]
2022-03-25 12:32 ` [Intel-gfx] [PATCH 08/13] drm/i915: Split out dg2_crtc_compute_clock() Ville Syrjala
2022-03-28 11:07 ` Jani Nikula
2022-03-25 12:32 ` [Intel-gfx] [PATCH 09/13] drm/i915: Add crtc .crtc_get_shared_dpll() Ville Syrjala
2022-03-28 11:10 ` Jani Nikula
2022-03-25 12:32 ` [Intel-gfx] [PATCH 10/13] drm/i915: Split shared dpll .get_dplls() into compute and get phases Ville Syrjala
2022-03-28 11:18 ` Jani Nikula
2022-03-25 12:32 ` [Intel-gfx] [PATCH 11/13] drm/i915: Do .crtc_compute_clock() earlier Ville Syrjala
2022-03-25 12:32 ` [Intel-gfx] [PATCH 12/13] drm/i915: Clean up DPLL related debugs Ville Syrjala
2022-03-28 11:14 ` Jani Nikula
2022-03-25 12:32 ` [Intel-gfx] [PATCH 13/13] drm/i915: Reassign DPLLs only for crtcs going throug .compute_config() Ville Syrjala
2022-03-25 14:19 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Start reordering modeset clock calculations Patchwork
2022-03-25 14:20 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-03-25 14:24 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
2022-03-25 14:41 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2022-03-29 13:18 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Start reordering modeset clock calculations (rev2) Patchwork
2022-03-29 13:19 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-03-29 13:23 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
2022-03-29 13:59 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2022-03-30 1:29 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Start reordering modeset clock calculations (rev3) Patchwork
2022-03-30 1:31 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-03-30 1:35 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
2022-03-30 2:09 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-03-30 3:37 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2022-04-14 2:10 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Start reordering modeset clock calculations (rev4) Patchwork
2022-04-14 2:10 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-04-14 2:33 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2022-04-21 16:59 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Start reordering modeset clock calculations (rev5) Patchwork
2022-04-21 17:28 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-04-21 21:51 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
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