From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from zen.linaro.local ([81.128.185.34]) by smtp.gmail.com with ESMTPSA id r10sm5815105wjf.2.2016.04.20.07.01.00 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 20 Apr 2016 07:01:00 -0700 (PDT) Received: from zen (localhost [127.0.0.1]) by zen.linaro.local (Postfix) with ESMTPS id 3AC0B3E022D; Wed, 20 Apr 2016 15:01:00 +0100 (BST) References: <1460044433-19282-1-git-send-email-sergey.fedorov@linaro.org> <1460044433-19282-9-git-send-email-sergey.fedorov@linaro.org> User-agent: mu4e 0.9.17; emacs 25.0.92.6 From: Alex =?utf-8?Q?Benn=C3=A9e?= To: Sergey Fedorov Cc: qemu-devel@nongnu.org, Sergey Fedorov , Paolo Bonzini , Peter Crosthwaite , Richard Henderson , Claudio Fontana , qemu-arm@nongnu.org Subject: Re: [PATCH 08/11] tcg/aarch64: Make direct jump patching thread-safe In-reply-to: <1460044433-19282-9-git-send-email-sergey.fedorov@linaro.org> Date: Wed, 20 Apr 2016 15:01:00 +0100 Message-ID: <87k2jsv0pv.fsf@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-TUID: u1ECjKJMq3kD Sergey Fedorov writes: > From: Sergey Fedorov > > Ensure direct jump patching in AArch64 is atomic by using > atomic_read()/atomic_set() for code patching. > > Signed-off-by: Sergey Fedorov > Signed-off-by: Sergey Fedorov > --- > tcg/aarch64/tcg-target.inc.c | 14 +++++++++++++- > 1 file changed, 13 insertions(+), 1 deletion(-) > > diff --git a/tcg/aarch64/tcg-target.inc.c b/tcg/aarch64/tcg-target.inc.c > index 0ed10a974121..15fdebec921f 100644 > --- a/tcg/aarch64/tcg-target.inc.c > +++ b/tcg/aarch64/tcg-target.inc.c > @@ -73,6 +73,18 @@ static inline void reloc_pc26(tcg_insn_unit *code_ptr, tcg_insn_unit *target) > *code_ptr = deposit32(*code_ptr, 0, 26, offset); > } > > +static inline void reloc_pc26_atomic(tcg_insn_unit *code_ptr, > + tcg_insn_unit *target) > +{ > + ptrdiff_t offset = target - code_ptr; > + tcg_insn_unit insn; > + assert(offset == sextract64(offset, 0, 26)); > + /* read instruction, mask away previous PC_REL26 parameter contents, > + set the proper offset, then write back the instruction. */ This comment could be moved from here and reloc_pc26 and made common for the two following functions. > + insn = atomic_read(code_ptr); > + atomic_set(code_ptr, deposit32(insn, 0, 26, offset)); > +} > + > static inline void reloc_pc19(tcg_insn_unit *code_ptr, tcg_insn_unit *target) > { > ptrdiff_t offset = target - code_ptr; > @@ -835,7 +847,7 @@ void aarch64_tb_set_jmp_target(uintptr_t jmp_addr, uintptr_t addr) > tcg_insn_unit *code_ptr = (tcg_insn_unit *)jmp_addr; > tcg_insn_unit *target = (tcg_insn_unit *)addr; > > - reloc_pc26(code_ptr, target); > + reloc_pc26_atomic(code_ptr, target); > flush_icache_range(jmp_addr, jmp_addr + 4); > } Otherwise: Reviewed-by: Alex Bennée -- Alex Bennée From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:49805) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1assgm-0000kX-8R for qemu-devel@nongnu.org; Wed, 20 Apr 2016 10:01:13 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1assgh-0006Sq-Tj for qemu-devel@nongnu.org; Wed, 20 Apr 2016 10:01:08 -0400 Received: from mail-wm0-x22d.google.com ([2a00:1450:400c:c09::22d]:38183) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1assgg-0006SW-LK for qemu-devel@nongnu.org; Wed, 20 Apr 2016 10:01:03 -0400 Received: by mail-wm0-x22d.google.com with SMTP id u206so83252953wme.1 for ; Wed, 20 Apr 2016 07:01:02 -0700 (PDT) References: <1460044433-19282-1-git-send-email-sergey.fedorov@linaro.org> <1460044433-19282-9-git-send-email-sergey.fedorov@linaro.org> From: Alex =?utf-8?Q?Benn=C3=A9e?= In-reply-to: <1460044433-19282-9-git-send-email-sergey.fedorov@linaro.org> Date: Wed, 20 Apr 2016 15:01:00 +0100 Message-ID: <87k2jsv0pv.fsf@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit Subject: Re: [Qemu-devel] [PATCH 08/11] tcg/aarch64: Make direct jump patching thread-safe List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Sergey Fedorov Cc: qemu-devel@nongnu.org, Sergey Fedorov , Paolo Bonzini , Peter Crosthwaite , Richard Henderson , Claudio Fontana , qemu-arm@nongnu.org Sergey Fedorov writes: > From: Sergey Fedorov > > Ensure direct jump patching in AArch64 is atomic by using > atomic_read()/atomic_set() for code patching. > > Signed-off-by: Sergey Fedorov > Signed-off-by: Sergey Fedorov > --- > tcg/aarch64/tcg-target.inc.c | 14 +++++++++++++- > 1 file changed, 13 insertions(+), 1 deletion(-) > > diff --git a/tcg/aarch64/tcg-target.inc.c b/tcg/aarch64/tcg-target.inc.c > index 0ed10a974121..15fdebec921f 100644 > --- a/tcg/aarch64/tcg-target.inc.c > +++ b/tcg/aarch64/tcg-target.inc.c > @@ -73,6 +73,18 @@ static inline void reloc_pc26(tcg_insn_unit *code_ptr, tcg_insn_unit *target) > *code_ptr = deposit32(*code_ptr, 0, 26, offset); > } > > +static inline void reloc_pc26_atomic(tcg_insn_unit *code_ptr, > + tcg_insn_unit *target) > +{ > + ptrdiff_t offset = target - code_ptr; > + tcg_insn_unit insn; > + assert(offset == sextract64(offset, 0, 26)); > + /* read instruction, mask away previous PC_REL26 parameter contents, > + set the proper offset, then write back the instruction. */ This comment could be moved from here and reloc_pc26 and made common for the two following functions. > + insn = atomic_read(code_ptr); > + atomic_set(code_ptr, deposit32(insn, 0, 26, offset)); > +} > + > static inline void reloc_pc19(tcg_insn_unit *code_ptr, tcg_insn_unit *target) > { > ptrdiff_t offset = target - code_ptr; > @@ -835,7 +847,7 @@ void aarch64_tb_set_jmp_target(uintptr_t jmp_addr, uintptr_t addr) > tcg_insn_unit *code_ptr = (tcg_insn_unit *)jmp_addr; > tcg_insn_unit *target = (tcg_insn_unit *)addr; > > - reloc_pc26(code_ptr, target); > + reloc_pc26_atomic(code_ptr, target); > flush_icache_range(jmp_addr, jmp_addr + 4); > } Otherwise: Reviewed-by: Alex Bennée -- Alex Bennée