Re: [PATCH 2/3] tests/tcg/arm: Tests for new FPRCVT instructions

["Alex Bennée" <alex.bennee@linaro.org>]

Jim MacArthur <jim.macarthur@linaro.org> writes:

> On Thu, Jun 18, 2026 at 08:04:27AM -0700, Richard Henderson wrote:
>> On 6/18/26 06:25, Alex Bennée wrote:
>> > I'm not sure about this as now we have one test with two modes. Can we
>> > not just create a new binary (fcvt-fprcvt) and keep running the original
>> > test either way.
>> > 
>> > See how we do that for the sha512 and it's various vector variants.
>> 
>> You certainly don't want to be duplicating the reference file.
>> 
>> Perhaps test the v8.0 convert insn output vs the FEAT_FPRCVT insn output directly?
>> 
>> Also, this patch is ordered incorrectly.  With the instruction feature test
>> properly in place, it will fail without the final patch to enable the
>> feature.
>
> I would rather not duplicate the reference file, but the other options include significant changes to the existing fcvt.c test.
>
> We could:
>
> 1) Make a separate fcvt-fprcvt.c test which compiles with the fcvt.c test, needing a header file for functions - requiring a much smaller separate fcvt-fprcvt.ref file, but information would still be duplicated in it
> 2) As you suggest, do a direct comparison between the general register
> and SIMD/FP regs, but since the current tests just output strings, it
> would require a significant change to how the current fcvt.c works.

We'd still keep the reference file to validate the main case though
right? We would just be inlining the SIMD into convert_single_to_integer
and validating it got the same result as the main conversion function.
It would be quiet unless it got something wrong.

>
> I will probably do the second option, but if anyone has any other ideas I'll listen.
>
> Jim

-- 
Alex Bennée
Virtualisation Tech Lead @ Linaro