From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B4A8639934A for ; Thu, 21 May 2026 19:30:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779391819; cv=none; b=QRN7Zm/x6TM11rFBm3oa+rypnWeMiRetVdmCxlru2STmuiXvF5SAPYD5adVDBSlpPOqurq1QgUj4BhVr58VUpIA/AmkduY+1v5KfYJyOrS0acww91Dz/MjhIzxV601QON6/gEbTbOMUDZQ7S/nm+xk4aetRVkgwIzqCMChKTEk8= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779391819; c=relaxed/simple; bh=2AVluIrtkCPMh2+qJIkCe4tDiJpxBb4Hg7aGaV/cQ8M=; h=From:To:Cc:Subject:In-Reply-To:References:Date:Message-ID: MIME-Version:Content-Type; b=I76zl074OsQLlChenUJkKl5eJBtDi4WCEOHC6bep3NFv1uath511+/nnrie2BzXWKPvFttKGi76dqoEKwXjWIqr2vwF1HHxu/KfiRgmRSG21fmW5PoDL0Xe9LSyx1F5H0HO1JkgkzwaRvSNS9o81tOCm7PDgn31tc48bHd3Y3bs= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=fDvbjWBR; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=6iHnoLaG; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="fDvbjWBR"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="6iHnoLaG" From: Thomas Gleixner DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1779391815; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=d6SzGxZs4MBdtrOPsZeSCR/9CCpeNIkqElWaqvNdXNU=; b=fDvbjWBRkQkGAJvVxQSvOoxdSWUQnv6i1G/4ozs/wEQNMf9kLs5h056blIcR+XrqhkH9t1 RAxp+0ZAsPIhwc8GdLjXoIkuHGIERrPubZ/gsRZg30hf8KzU5mYJqua1SL/P5g2aX6IWv6 hmEa3ij5XUFr3gJ1DPInDCSwNFcFb1VS+xdOkG8ISqL2yf8TH1wDEiN9FkKkAM2LUic/9c xK7iR85Vo5YhFtgmTwMs9Sc8WCTnxwwqP9zQ8pRxMxqSS9b1D8bMtRGQnCGUSSSxMbG7xk wZyGXuH9twYRoJyol7leRBV9NUn2H1/MZPX/3uOMMM5OQqpdykPKQFHLaG3Luw== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1779391815; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=d6SzGxZs4MBdtrOPsZeSCR/9CCpeNIkqElWaqvNdXNU=; b=6iHnoLaGsXTFY3MvLUi3R74AizeNeApWzuSnAhIrf0grCaoGJR2ctkue/SqNndxK0QH1+4 DphfvcUTqKNdeJCw== To: Dimitri Sivanich , Linux Kernel Mailing List Cc: Jiri Wiesner , Steve Wahl , Justin Ernst , Kyle Meyer , Russ Anderson , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , "Peter Zijlstra (Intel)" , Ilpo =?utf-8?Q?J=C3=A4rvinen?= , Marco Elver , "Guilherme G. Piccoli" , Nikunj A Dadhania , "Xin Li (Intel)" , Dimitri Sivanich Subject: Re: [PATCH v4 0/2] x86/tsc: Exempt recent UV systems from clocksource watchdog checks to avoid false positives. In-Reply-To: References: Date: Thu, 21 May 2026 21:30:14 +0200 Message-ID: <87lddcv9vd.ffs@tglx> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain On Thu, May 21 2026 at 08:17, Dimitri Sivanich wrote: > HPE UV hardware and firmware is designed to ensure a reliable and > synchronized TSC mechanism. Comparing the TSC against secondary > clocksources can result in false positives due to variable access > latency caused by system traffic. The best course of action against > these false positives has been found to simply disable watchdog > checking of the TSC. > > Commits [1] and [2] were introduced to avoid an issue where the TSC > is falsely declared unstable by exempting qualified platforms of up > to 4-sockets from TSC clocksource watchdog checking. Extend that > exemption to include recent and future UV platforms. Jiri asked you in the V3 submission: "A new implementation of the clocksource watchdog has been merged into the upstream kernel. One of the changes made by the new clocksource watchdog implementation is that reference clocksource reads are made on the boot CPU only. Perhaps, the sgi_rtc clocksource would work well with this implementation. So, testing is needed in order to find out if this patch are any future in the upstream Linux. Dimitri, would you be able to run tests on UV systems to check if the new clocksource watchdog implementation works and the hardware limitations of sgi_rtc do not get in the way?" This question is still not answered by you and it has been confirmed that the new watchdog works flawlessly on a 1920 threads 16 socket system under massive load and system traffic. So you do not even have the courtesy to test, you just go and make the same claims you made before based on the original watchdog implementation. Feel free to ignore people, but then don't be surprised when people ignore you as well. Thanks, tglx