From: "Alex Bennée" <alex.bennee@linaro.org>
To: Jim MacArthur <jim.macarthur@linaro.org>
Cc: qemu-devel@nongnu.org
Subject: Re: [PATCH 2/3] target/arm: Enable ASID2 for cpu_max, allow writes to FNG1, FNG0, A2
Date: Mon, 24 Nov 2025 13:52:43 +0000 [thread overview]
Message-ID: <87ldjv8rmc.fsf@draig.linaro.org> (raw)
In-Reply-To: <20251120125833.123813-3-jim.macarthur@linaro.org> (Jim MacArthur's message of "Thu, 20 Nov 2025 12:54:15 +0000")
Jim MacArthur <jim.macarthur@linaro.org> writes:
> This just allows read/write of three feature bits. ASID is still
> ignored. Any writes to TTBR0_EL0 and TTBR1_EL0, including changing
> the ASID, will still cause a complete flush of the TLB.
>
> Signed-off-by: Jim MacArthur <jim.macarthur@linaro.org>
I will defer to Peter on this but I'd potentially split the adding of
the feature from the enabling it automatically in -cpu max. But its a
minor thing given the size of the patch.
Could you also update docs/system/arm/emulation.rst with the feature.
Otherwise:
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
--
Alex Bennée
Virtualisation Tech Lead @ Linaro
next prev parent reply other threads:[~2025-11-24 13:53 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-20 12:54 [PATCH v2 0/3] Basic ASID2 Support Jim MacArthur
2025-11-20 12:54 ` [PATCH 1/3] target/arm: Enable ID_AA64MMFR4_EL1 register Jim MacArthur
2025-11-24 13:50 ` Alex Bennée
2025-11-24 19:46 ` Richard Henderson
2025-11-20 12:54 ` [PATCH 2/3] target/arm: Enable ASID2 for cpu_max, allow writes to FNG1, FNG0, A2 Jim MacArthur
2025-11-24 13:52 ` Alex Bennée [this message]
2025-11-24 19:46 ` Richard Henderson
2025-11-20 12:54 ` [PATCH 3/3] tests: Add test for ASID2 and write/read of feature bits Jim MacArthur
2025-11-24 15:01 ` Alex Bennée
2025-11-25 21:29 ` Jim MacArthur
2025-11-26 10:31 ` Alex Bennée
-- strict thread matches above, loose matches on Subject: below --
2025-11-12 9:17 [PATCH 0/3] Basic ASID2 support Jim MacArthur
2025-11-12 9:17 ` [PATCH 2/3] target/arm: Enable ASID2 for cpu_max, allow writes to FNG1, FNG0, A2 Jim MacArthur
2025-11-15 12:17 ` Richard Henderson
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