From: Marc Zyngier <maz@kernel.org>
To: Anup Patel <apatel@ventanamicro.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Thomas Gleixner <tglx@linutronix.de>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
Rob Herring <robh+dt@kernel.org>,
Atish Patra <atishp@atishpatra.org>,
Alistair Francis <Alistair.Francis@wdc.com>,
Anup Patel <anup@brainfault.org>,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 2/6] irqchip/riscv-intc: Set intc domain as the default host
Date: Tue, 25 Jan 2022 18:17:50 +0000 [thread overview]
Message-ID: <87lez37k8h.wl-maz@kernel.org> (raw)
In-Reply-To: <20220125054217.383482-3-apatel@ventanamicro.com>
On Tue, 25 Jan 2022 05:42:13 +0000,
Anup Patel <apatel@ventanamicro.com> wrote:
>
> We have quite a few RISC-V drivers (such as RISC-V SBI IPI driver,
> RISC-V timer driver, RISC-V PMU driver, etc) which do not have a
> dedicated DT/ACPI fwnode. This patch makes intc domain as the default
> host so that these drivers can directly create local interrupt mapping
> using standardized local interrupt numbers
>
> Signed-off-by: Anup Patel <apatel@ventanamicro.com>
> ---
> drivers/clocksource/timer-riscv.c | 17 +----------------
> drivers/irqchip/irq-riscv-intc.c | 9 +++++++++
> 2 files changed, 10 insertions(+), 16 deletions(-)
>
> diff --git a/drivers/clocksource/timer-riscv.c b/drivers/clocksource/timer-riscv.c
> index 1767f8bf2013..dd6916ae6365 100644
> --- a/drivers/clocksource/timer-riscv.c
> +++ b/drivers/clocksource/timer-riscv.c
> @@ -102,8 +102,6 @@ static irqreturn_t riscv_timer_interrupt(int irq, void *dev_id)
> static int __init riscv_timer_init_dt(struct device_node *n)
> {
> int cpuid, hartid, error;
> - struct device_node *child;
> - struct irq_domain *domain;
>
> hartid = riscv_of_processor_hartid(n);
> if (hartid < 0) {
> @@ -121,20 +119,7 @@ static int __init riscv_timer_init_dt(struct device_node *n)
> if (cpuid != smp_processor_id())
> return 0;
>
> - domain = NULL;
> - child = of_get_compatible_child(n, "riscv,cpu-intc");
> - if (!child) {
> - pr_err("Failed to find INTC node [%pOF]\n", n);
> - return -ENODEV;
> - }
> - domain = irq_find_host(child);
> - of_node_put(child);
> - if (!domain) {
> - pr_err("Failed to find IRQ domain for node [%pOF]\n", n);
> - return -ENODEV;
> - }
> -
> - riscv_clock_event_irq = irq_create_mapping(domain, RV_IRQ_TIMER);
> + riscv_clock_event_irq = irq_create_mapping(NULL, RV_IRQ_TIMER);
> if (!riscv_clock_event_irq) {
> pr_err("Failed to map timer interrupt for node [%pOF]\n", n);
> return -ENODEV;
> diff --git a/drivers/irqchip/irq-riscv-intc.c b/drivers/irqchip/irq-riscv-intc.c
> index b65bd8878d4f..9f0a7a8a5c4d 100644
> --- a/drivers/irqchip/irq-riscv-intc.c
> +++ b/drivers/irqchip/irq-riscv-intc.c
> @@ -125,6 +125,15 @@ static int __init riscv_intc_init(struct device_node *node,
> return rc;
> }
>
> + /*
> + * Make INTC as the default domain which will allow drivers
> + * not having dedicated DT/ACPI fwnode (such as RISC-V SBI IPI
> + * driver, RISC-V timer driver, RISC-V PMU driver, etc) can
> + * directly create local interrupt mapping using standardized
> + * local interrupt numbers.
> + */
> + irq_set_default_host(intc_domain);
No, please. This really is a bad idea. This sort of catch-all have
constantly proven to be a nuisance, because they discard all the
topology information. Eventually, you realise that you need to know
where this is coming from, but it really is too late.
I'd rather you *synthesise* a fwnode (like ACPI does) rather then do
this.
M.
--
Without deviation from the norm, progress is not possible.
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2022-01-25 18:18 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-01-25 5:42 [PATCH 0/6] RISC-V IPI Improvements Anup Patel
2022-01-25 5:42 ` [PATCH 1/6] RISC-V: Clear SIP bit only when using SBI IPI operations Anup Patel
2022-01-25 5:42 ` [PATCH 2/6] irqchip/riscv-intc: Set intc domain as the default host Anup Patel
2022-01-25 18:17 ` Marc Zyngier [this message]
2022-01-26 3:16 ` Anup Patel
2022-01-26 9:01 ` Marc Zyngier
2022-01-26 10:12 ` Anup Patel
2022-01-26 10:46 ` Marc Zyngier
2022-01-26 15:38 ` Anup Patel
2022-01-25 5:42 ` [PATCH 3/6] RISC-V: Treat IPIs as normal Linux IRQs Anup Patel
2022-01-25 5:42 ` [PATCH 4/6] RISC-V: Allow marking IPIs as suitable for remote FENCEs Anup Patel
2022-01-25 5:42 ` [PATCH 5/6] RISC-V: Use IPIs for remote TLB flush when possible Anup Patel
2022-01-25 5:42 ` [PATCH 6/6] RISC-V: Use IPIs for remote icache " Anup Patel
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=87lez37k8h.wl-maz@kernel.org \
--to=maz@kernel.org \
--cc=Alistair.Francis@wdc.com \
--cc=anup@brainfault.org \
--cc=apatel@ventanamicro.com \
--cc=atishp@atishpatra.org \
--cc=daniel.lezcano@linaro.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-riscv@lists.infradead.org \
--cc=palmer@dabbelt.com \
--cc=paul.walmsley@sifive.com \
--cc=robh+dt@kernel.org \
--cc=tglx@linutronix.de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.