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Wed, 21 Jul 2021 09:51:11 -0700 (PDT) Received: from zen.linaroharston ([51.148.130.216]) by smtp.gmail.com with ESMTPSA id u2sm439827wmm.37.2021.07.21.09.51.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 21 Jul 2021 09:51:10 -0700 (PDT) Received: from zen (localhost [127.0.0.1]) by zen.linaroharston (Postfix) with ESMTP id 305DB1FF7E; Wed, 21 Jul 2021 17:51:10 +0100 (BST) References: <20210720195439.626594-1-richard.henderson@linaro.org> <20210720195439.626594-18-richard.henderson@linaro.org> <878s20kkmv.fsf@linaro.org> <0c4a0e4d-faf1-3843-edf5-2ae807a33b94@linaro.org> User-agent: mu4e 1.5.14; emacs 28.0.50 From: Alex =?utf-8?Q?Benn=C3=A9e?= To: Richard Henderson Subject: Re: [PATCH for-6.1 v6 17/17] accel/tcg: Record singlestep_enabled in tb->cflags Date: Wed, 21 Jul 2021 17:48:32 +0100 In-reply-to: <0c4a0e4d-faf1-3843-edf5-2ae807a33b94@linaro.org> Message-ID: <87lf5zy5j6.fsf@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Received-SPF: pass client-ip=2a00:1450:4864:20::330; envelope-from=alex.bennee@linaro.org; helo=mail-wm1-x330.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, mark.cave-ayland@ilande.co.uk, qemu-devel@nongnu.org, f4bug@amsat.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Richard Henderson writes: > On 7/21/21 12:38 AM, Alex Benn=C3=A9e wrote: >> Richard Henderson writes: >>=20 >>> Set CF_SINGLE_STEP when single-stepping is enabled. >>> This avoids the need to flush all tb's when turning >>> single-stepping on or off. >>> >>> Signed-off-by: Richard Henderson >>> --- >>> include/exec/exec-all.h | 1 + >>> accel/tcg/cpu-exec.c | 7 ++++++- >>> accel/tcg/translate-all.c | 4 ---- >>> accel/tcg/translator.c | 7 +------ >>> cpu.c | 4 ---- >>> 5 files changed, 8 insertions(+), 15 deletions(-) >>> >>> diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h >>> index 6873cce8df..5d1b6d80fb 100644 >>> --- a/include/exec/exec-all.h >>> +++ b/include/exec/exec-all.h >>> @@ -497,6 +497,7 @@ struct TranslationBlock { >>> #define CF_COUNT_MASK 0x000001ff >>> #define CF_NO_GOTO_TB 0x00000200 /* Do not chain with goto_tb */ >>> #define CF_NO_GOTO_PTR 0x00000400 /* Do not chain with goto_ptr */ >>> +#define CF_SINGLE_STEP 0x00000800 /* gdbstub single-step in effect */ >>> #define CF_LAST_IO 0x00008000 /* Last insn may be an IO access.= */ >>> #define CF_MEMI_ONLY 0x00010000 /* Only instrument memory ops */ >>> #define CF_USE_ICOUNT 0x00020000 >>> diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c >>> index 5cc6363f4c..fc895cf51e 100644 >>> --- a/accel/tcg/cpu-exec.c >>> +++ b/accel/tcg/cpu-exec.c >>> @@ -150,10 +150,15 @@ uint32_t curr_cflags(CPUState *cpu) >>> uint32_t cflags =3D cpu->tcg_cflags; >>> /* >>> + * Record gdb single-step. We should be exiting the TB by raising >>> + * EXCP_DEBUG, but to simplify other tests, disable chaining too. >>> + * >>> * For singlestep and -d nochain, suppress goto_tb so that >>> * we can log -d cpu,exec after every TB. >>> */ >>> - if (singlestep) { >>> + if (unlikely(cpu->singlestep_enabled)) { >>> + cflags |=3D CF_NO_GOTO_TB | CF_NO_GOTO_PTR | CF_SINGLE_STEP | >>> 1; >> What does CF_SINGLE_STEP achieve that isn't already handled by >> having: >> cflags |=3D CF_NO_GOTO_TB | CF_NO_GOTO_PTR | 1; > > It sets DisasContextBase.singlestep_enabled. Ahh fair enough... I was only thinking of the effect on stored and looked up translations. I guess we still have bits we can rob if we need to until the day we expand cflags and flags to full 64 bit values. > With only this patch set, we still check that and emit EXCP_DEBUG at > the end of every TB. After the 6.2 singlestep cleanup, we still have > one reference to DisasContextBase.singlestep_enabled in target/mips > for the branch delay slot thing that we discussed on IRC yesterday. > >> (btw did we mask CF_COUNT_MASK somewhere else?). Because surely the >> CF_COUNT is part of cflags so limits the TB's that could be returned >> anyway? > > Here in curr_cflags(), CF_COUNT_MASK begins at zero. OK: Reviewed-by: Alex Benn=C3=A9e --=20 Alex Benn=C3=A9e