From: Jani Nikula <jani.nikula@linux.intel.com>
To: "Navare, Manasi" <manasi.d.navare@intel.com>,
"Ville Syrjälä" <ville.syrjala@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH v10 06/11] drm/i915: Enable big joiner support in enable and disable sequences.
Date: Mon, 19 Oct 2020 14:34:07 +0300 [thread overview]
Message-ID: <87lfg2a1qo.fsf@intel.com> (raw)
In-Reply-To: <20201016192442.GB4421@labuser-Z97X-UD5H>
On Fri, 16 Oct 2020, "Navare, Manasi" <manasi.d.navare@intel.com> wrote:
> I really want to push back on any design changes at this point since we have a working solution
> and we currently dont have any special cases. Like I discussed with you all the commit modeset enables
> code is now generic and similar to 2p2p.
> These kind of changes/ optimizations can be done later. Like you suggested we should get the basic working
> solution and support in.
Like I said in [1], this is a big scary patch that has been reported to
break DSI VDSC. I tried to skim through it, but it's really impossible
to identify the one thing that could break DSI.
I mean, even if you had the hardware to test, it could take days to
identify the regressing part here.
And this isn't really specific to DSI, but rather to *any* regression
this might cause. Afterwards, would you stand a chance of telling what
goes wrong if you get a bisect result?
BR,
Jani.
[1] http://lore.kernel.org/r/87o8l5awvr.fsf@intel.com
--
Jani Nikula, Intel Open Source Graphics Center
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next prev parent reply other threads:[~2020-10-19 11:34 UTC|newest]
Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-08 21:45 [Intel-gfx] [PATCH v10 01/11] HAX to make DSC work on the icelake test system Manasi Navare
2020-10-08 21:45 ` [Intel-gfx] [PATCH v10 02/11] drm/i915/display: Rename pipe_timings to transcoder_timings Manasi Navare
2020-10-08 21:45 ` [Intel-gfx] [PATCH v10 03/11] drm/i915: Add hw.pipe_mode to allow bigjoiner pipe/transcoder split Manasi Navare
2020-10-08 21:45 ` [Intel-gfx] [PATCH v10 04/11] drm/i915/dp: Allow big joiner modes in intel_dp_mode_valid(), v3 Manasi Navare
2020-10-14 11:26 ` Ville Syrjälä
2020-10-14 19:04 ` Navare, Manasi
2020-10-15 11:52 ` Ville Syrjälä
2020-10-15 16:26 ` Navare, Manasi
2020-10-19 16:30 ` Ville Syrjälä
2020-10-19 22:51 ` Navare, Manasi
2020-10-20 18:39 ` Ville Syrjälä
2020-10-20 18:53 ` Navare, Manasi
2020-10-08 21:45 ` [Intel-gfx] [PATCH v10 05/11] drm/i915: Try to make bigjoiner work in atomic check Manasi Navare
2020-10-11 11:18 ` kernel test robot
2020-10-14 11:33 ` Ville Syrjälä
2020-10-14 19:09 ` Navare, Manasi
2020-10-08 21:45 ` [Intel-gfx] [PATCH v10 06/11] drm/i915: Enable big joiner support in enable and disable sequences Manasi Navare
2020-10-14 11:07 ` Jani Nikula
2020-10-15 13:07 ` Ville Syrjälä
2020-10-15 16:37 ` Navare, Manasi
2020-10-16 16:06 ` Ville Syrjälä
2020-10-16 18:17 ` Navare, Manasi
2020-10-16 18:50 ` Ville Syrjälä
2020-10-16 19:24 ` Navare, Manasi
2020-10-19 11:34 ` Jani Nikula [this message]
2020-10-19 22:53 ` Navare, Manasi
2020-10-08 21:45 ` [Intel-gfx] [PATCH v10 07/11] drm/i915: Make hardware readout work on i915 Manasi Navare
2020-10-11 20:18 ` kernel test robot
2020-10-19 16:36 ` Ville Syrjälä
2020-10-19 22:45 ` Navare, Manasi
2020-10-20 18:45 ` Ville Syrjälä
2020-10-20 18:57 ` Navare, Manasi
2020-10-20 21:57 ` Navare, Manasi
2020-10-08 21:45 ` [Intel-gfx] [PATCH v10 08/11] drm/i915: Link planes in a bigjoiner configuration, v3 Manasi Navare
2020-10-08 21:45 ` [Intel-gfx] [PATCH v10 09/11] drm/i915: Add bigjoiner aware plane clipping checks Manasi Navare
2020-10-19 16:20 ` Ville Syrjälä
2020-10-19 22:56 ` Navare, Manasi
2020-10-20 18:51 ` Ville Syrjälä
2020-10-08 21:45 ` [Intel-gfx] [PATCH v10 10/11] drm/i915: Ensure correct master/slave enable/disable sequence Manasi Navare
2020-10-19 16:26 ` Ville Syrjälä
2020-10-19 23:05 ` Navare, Manasi
2020-10-08 21:45 ` [Intel-gfx] [PATCH v10 11/11] drm/i915: Add debugfs dumping for bigjoiner, v3 Manasi Navare
2020-10-08 22:15 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v10,01/11] HAX to make DSC work on the icelake test system Patchwork
2020-10-08 22:17 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-10-08 22:33 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-10-09 1:32 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2020-10-13 19:19 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v10,01/11] HAX to make DSC work on the icelake test system (rev2) Patchwork
2020-10-13 19:21 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-10-13 19:45 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-10-14 14:32 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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