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[98.179.76.75]) by smtp.gmail.com with ESMTPSA id 61sm100143qta.19.2020.10.13.09.05.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 13 Oct 2020 09:05:22 -0700 (PDT) References: <20201001180925.13808-1-James.Bottomley@HansenPartnership.com> <20201013011745.GA41176@linux.intel.com> <87tuuyf97r.fsf@jsnitsel.users.ipa.redhat.com> User-agent: mu4e 1.4.10; emacs 27.1 From: Jerry Snitselaar To: James Bottomley Cc: equired@linux.intel.com, justmentioningitbecauseIthinkthatwouldbeagood@linux.intel.com, linux-integrity@vger.kernel.org, Jason Gunthorpe , "Peter Huewe" , Borislav Petkov , Nayna Jain , Hans de Goede Subject: Re: [PATCH v2 0/5] tpm_tis: fix interrupts (again) In-reply-to: Date: Tue, 13 Oct 2020 09:05:19 -0700 Message-ID: <87lfgaf6ww.fsf@jsnitsel.users.ipa.redhat.com> MIME-Version: 1.0 Content-Type: text/plain Precedence: bulk List-ID: X-Mailing-List: linux-integrity@vger.kernel.org James Bottomley @ 2020-10-13 08:24 MST: > On Tue, 2020-10-13 at 08:15 -0700, Jerry Snitselaar wrote: >> Jarkko Sakkinen @ 2020-10-12 18:17 MST: >> >> > On Thu, Oct 01, 2020 at 11:09:20AM -0700, James Bottomley wrote: >> > > The current state of the TIS TPM is that interrupts have been >> > > globally disabled by various changes. The problems we got >> > > reported the last time they were enabled was interrupt >> > > storms. With my own TIS TPM, I've found that this is caused >> > > because my TPM doesn't do legacy cycles, The TIS spec (chapter >> > > 6.1 "Locality Usage Per Register") requires any TIS TPM without >> > > legacy cycles not to act on any write to an interrupt register >> > > unless the locality is enabled. This means if an interrupt fires >> > > after we relinquish the locality, the TPM_EOI in the interrupt >> > > routine is ineffective meaning the same interrupt triggers over >> > > and over again. This problem also means we can have trouble >> > > setting up interrupts on TIS TPMs because the current init >> > > code does the setup before the locality is claimed for the first >> > > time. >> > > >> > > James >> > >> > You should consider expanding the audience. > > Well, most people interested in testing this sort of thing are already > on the integrity list. > >> > Jerry, once you have some bandwidth (no rush, does not land before >> > rc2), it would be great that if you could try this. I'm emphasizing >> > this just because of the intersection. I think it would also make >> > senset to get tested-by from Nayna. >> >> I will run some tests on some other systems I have access to. As >> noted in the other email I did a quick test with a t490s with an >> older bios that exhibits the problem originally reported when >> Stefan's patch enabled interrupts. > > Well, it means there's still some other problem. I was hoping that > because the rainbow pass system originally exhibited the same symptoms > (interrupt storm) fixing it would also fix the t490 and the ineffective > EOI bug looked like a great candidate for being the root cause. > Adding Hans to the list. IIUC in the t490s case the problem lies with the hardware itself. Hans, is that correct? > How amenable are you to debugging this? I originally figured out the > problem with the rainbow pass by putting ratelimited printks in the > interrupt routine and most of the TIS transmission ones, but it's > somewhat labour intensive doing it this way. > > James