From: Jani Nikula <jani.nikula@linux.intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>,
intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 3/4] drm/i915: Nuke MI_ARB_STATE save/restore
Date: Fri, 11 Sep 2020 19:48:50 +0300 [thread overview]
Message-ID: <87lfhgz2bx.fsf@intel.com> (raw)
In-Reply-To: <20200908140210.31048-3-ville.syrjala@linux.intel.com>
On Tue, 08 Sep 2020, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Originally added in commit 1f84e550a870 ("drm/i915 more registers for
> S3 (DSPCLK_GATE_D, CACHE_MODE_0, MI_ARB_STATE)") to fix some underruns.
> I suspect that was due to the trickle feed settings getting clobbered
> during suspend. We've been disabling trickle feed explicitly since
> commit 20f949670f51 ("drm/i915: Disable trickle feed via MI_ARB_STATE
> for the gen4") so this magic save/restore should no longer be needed.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
> ---
> drivers/gpu/drm/i915/i915_drv.h | 1 -
> drivers/gpu/drm/i915/i915_suspend.c | 6 ------
> 2 files changed, 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 3917bb1a6157..cf51246b5402 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -538,7 +538,6 @@ struct intel_gmbus {
> struct i915_suspend_saved_registers {
> u32 saveDSPARB;
> u32 saveCACHE_MODE_0;
> - u32 saveMI_ARB_STATE;
> u32 saveSWF0[16];
> u32 saveSWF1[16];
> u32 saveSWF3[3];
> diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c
> index 592c230e6914..34c7d7bccec5 100644
> --- a/drivers/gpu/drm/i915/i915_suspend.c
> +++ b/drivers/gpu/drm/i915/i915_suspend.c
> @@ -66,9 +66,6 @@ int i915_save_state(struct drm_i915_private *dev_priv)
> if (INTEL_GEN(dev_priv) < 7)
> dev_priv->regfile.saveCACHE_MODE_0 = I915_READ(CACHE_MODE_0);
>
> - /* Memory Arbitration state */
> - dev_priv->regfile.saveMI_ARB_STATE = I915_READ(MI_ARB_STATE);
> -
> /* Scratch space */
> if (IS_GEN(dev_priv, 2) && IS_MOBILE(dev_priv)) {
> for (i = 0; i < 7; i++) {
> @@ -107,9 +104,6 @@ int i915_restore_state(struct drm_i915_private *dev_priv)
> I915_WRITE(CACHE_MODE_0, dev_priv->regfile.saveCACHE_MODE_0 |
> 0xffff0000);
>
> - /* Memory arbitration state */
> - I915_WRITE(MI_ARB_STATE, dev_priv->regfile.saveMI_ARB_STATE | 0xffff0000);
> -
> /* Scratch space */
> if (IS_GEN(dev_priv, 2) && IS_MOBILE(dev_priv)) {
> for (i = 0; i < 7; i++) {
--
Jani Nikula, Intel Open Source Graphics Center
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next prev parent reply other threads:[~2020-09-11 16:48 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-08 14:02 [Intel-gfx] [PATCH 1/4] drm/i915: Kill unused savePCH_PORT_HOTPLUG Ville Syrjala
2020-09-08 14:02 ` [Intel-gfx] [PATCH 2/4] drm/i915: Nuke the magic FBC_CONTROL save/restore Ville Syrjala
2020-09-11 16:47 ` Jani Nikula
2020-09-08 14:02 ` [Intel-gfx] [PATCH 3/4] drm/i915: Nuke MI_ARB_STATE save/restore Ville Syrjala
2020-09-11 16:48 ` Jani Nikula [this message]
2020-09-08 14:02 ` [Intel-gfx] [PATCH 4/4] drm/i915: Nuke CACHE_MODE_0 save/restore Ville Syrjala
2020-09-11 16:50 ` Jani Nikula
2020-09-08 14:28 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/4] drm/i915: Kill unused savePCH_PORT_HOTPLUG Patchwork
2020-09-10 12:56 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/4] drm/i915: Kill unused savePCH_PORT_HOTPLUG (rev2) Patchwork
2020-09-10 14:48 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2020-09-11 16:41 ` [Intel-gfx] [PATCH 1/4] drm/i915: Kill unused savePCH_PORT_HOTPLUG Jani Nikula
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