From: Jani Nikula <jani.nikula@linux.intel.com>
To: Anshuman Gupta <anshuman.gupta@intel.com>
Cc: igt-dev@lists.freedesktop.org, martin.peres@intel.com
Subject: Re: [igt-dev] [RFC i-g-t] LPSP igt test on TGL
Date: Tue, 03 Mar 2020 12:44:30 +0200 [thread overview]
Message-ID: <87lfohpvjl.fsf@intel.com> (raw)
In-Reply-To: <20200303084530.GG9735@intel.com>
On Tue, 03 Mar 2020, Anshuman Gupta <anshuman.gupta@intel.com> wrote:
> On 2020-03-03 at 10:34:06 +0200, Jani Nikula wrote:
>> On Tue, 03 Mar 2020, Anshuman Gupta <anshuman.gupta@intel.com> wrote:
>> > On 2020-02-27 at 14:44:18 +0200, Jani Nikula wrote:
>> >> On Thu, 27 Feb 2020, Anshuman Gupta <anshuman.gupta@intel.com> wrote:
>> > Add a connector specific debugfs attributes i915_lpsp_cpable.
>> > for ecah connector if it is lpsp capable, do modeset with pipe A crtc
>> > on that connector and validate if power wells above pg2 are turned off
>> > by using i915_power_domain_info.
>>
>> Why not add a debugfs file that will tell you both, instead of forcing
>> the userspace to know about the connection between lpsp and pg2?
> IMHO a DP/HDMI connector may not be connected to pipe A crtc in default mode.
What is default mode?
> So via igt we can have modeset on Pipe A with DP/HDMI connector and can
> validate lpsp for DP/HDMI connector.
> Please correct me if am wrong.
Sorry, I am not sure what you're asking.
BR,
Jani.
--
Jani Nikula, Intel Open Source Graphics Center
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next prev parent reply other threads:[~2020-03-03 10:44 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-27 8:41 [igt-dev] [RFC i-g-t] LPSP igt test on TGL Anshuman Gupta
2020-02-27 12:44 ` Jani Nikula
2020-03-03 4:27 ` Anshuman Gupta
2020-03-03 8:34 ` Jani Nikula
2020-03-03 8:45 ` Anshuman Gupta
2020-03-03 10:44 ` Jani Nikula [this message]
2020-03-03 12:20 ` Anshuman Gupta
2020-02-27 12:55 ` Ville Syrjälä
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