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From: Jani Nikula <jani.nikula@intel.com>
To: Madhav Chauhan <madhav.chauhan@intel.com>,
	intel-gfx@lists.freedesktop.org
Cc: ander.conselvan.de.oliveira@intel.com
Subject: Re: [PATCH] drm/i915/glk: Fix DSI enable I/O sequence
Date: Thu, 02 Mar 2017 16:39:56 +0200	[thread overview]
Message-ID: <87lgsneo8z.fsf@intel.com> (raw)
In-Reply-To: <1488393082-30660-1-git-send-email-madhav.chauhan@intel.com>

On Wed, 01 Mar 2017, Madhav Chauhan <madhav.chauhan@intel.com> wrote:
> One of the if statement covers the next line in enable I/O sequence.
> This patch correct the same by adding error message.
>
> Signed-off-by: Madhav Chauhan <madhav.chauhan@intel.com>

Pushed, thanks for the patch.

BR,
Jani.

> ---
>  drivers/gpu/drm/i915/intel_dsi.c | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c
> index 8e97bae3..c92004b 100644
> --- a/drivers/gpu/drm/i915/intel_dsi.c
> +++ b/drivers/gpu/drm/i915/intel_dsi.c
> @@ -425,6 +425,7 @@ static void glk_dsi_device_ready(struct intel_encoder *encoder)
>  		if (intel_wait_for_register(dev_priv,
>  				MIPI_CTRL(port), GLK_ULPS_NOT_ACTIVE,
>  				GLK_ULPS_NOT_ACTIVE, 20))
> +			DRM_ERROR("ULPS is still active\n");
>  
>  		/* Exit ULPS */
>  		val = I915_READ(MIPI_DEVICE_READY(port));

-- 
Jani Nikula, Intel Open Source Technology Center
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Intel-gfx mailing list
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      parent reply	other threads:[~2017-03-02 14:39 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-03-01 18:31 [PATCH] drm/i915/glk: Fix DSI enable I/O sequence Madhav Chauhan
2017-03-01 19:47 ` ✗ Fi.CI.BAT: warning for " Patchwork
2017-03-02 14:39 ` Jani Nikula [this message]

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