From: Jani Nikula <jani.nikula@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>, intel-gfx@lists.freedesktop.org
Cc: stable@vger.kernel.org
Subject: Re: [PATCH] drm/i915: Use the correct GMCH_CTRL register for Sandybridge+
Date: Tue, 17 Dec 2013 18:03:04 +0200 [thread overview]
Message-ID: <87lhzj1n47.fsf@intel.com> (raw)
In-Reply-To: <1387290890-29786-1-git-send-email-chris@chris-wilson.co.uk>
On Tue, 17 Dec 2013, Chris Wilson <chris@chris-wilson.co.uk> wrote:
> The GMCH_CTRL register (or MGCC in the spec) is at a different address
> on Sandybridge, and the address to which we currently write to is
> undefined. These stray writes appear to upset (hard hang) my Ivybridge
> machine whilst it is in UEFI mode.
>
> Note that the register is still marked as locked RO on Sandybridge, so
> vgaarb is still dysfunctional.
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Jani Nikula <jani.nikula@linux.intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: stable@vger.kernel.org
> ---
> drivers/gpu/drm/i915/intel_display.c | 5 +++--
> 1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 7db292c469af..9caf6a879f31 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -11334,9 +11334,10 @@ void intel_connector_attach_encoder(struct intel_connector *connector,
> int intel_modeset_vga_set_state(struct drm_device *dev, bool state)
> {
> struct drm_i915_private *dev_priv = dev->dev_private;
> + unsigned reg = INTEL_INFO(dev)->gen >= 6 ? SNB_GMCH_CTRL : INTEL_GMCH_CTRL;
> u16 gmch_ctrl;
>
> - if (pci_read_config_word(dev_priv->bridge_dev, INTEL_GMCH_CTRL, &gmch_ctrl)) {
> + if (pci_read_config_word(dev_priv->bridge_dev, reg, &gmch_ctrl)) {
> DRM_ERROR("failed to read control word\n");
> return -EIO;
> }
> @@ -11346,7 +11347,7 @@ int intel_modeset_vga_set_state(struct drm_device *dev, bool state)
> else
> gmch_ctrl |= INTEL_GMCH_VGA_DISABLE;
>
> - if (pci_write_config_word(dev_priv->bridge_dev, INTEL_GMCH_CTRL, gmch_ctrl)) {
> + if (pci_write_config_word(dev_priv->bridge_dev, reg, gmch_ctrl)) {
> DRM_ERROR("failed to write control word\n");
> return -EIO;
> }
> --
> 1.8.5.1
>
--
Jani Nikula, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2013-12-17 16:07 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-12-16 16:04 [PATCH 1/2] drm/i915: Propagate PCI read/write errors during vga_set_state() Chris Wilson
2013-12-16 16:04 ` [PATCH 2/2] drm/i915: Short-circuit no-op vga_set_state() Chris Wilson
2013-12-17 9:21 ` Jani Nikula
2013-12-17 11:45 ` Chris Wilson
2013-12-17 12:02 ` Chris Wilson
2013-12-17 14:34 ` [PATCH] drm/i915: Use the correct GMCH_CTRL register for Sandybridge+ Chris Wilson
2013-12-17 16:03 ` Jani Nikula [this message]
2013-12-17 9:14 ` [PATCH 1/2] drm/i915: Propagate PCI read/write errors during vga_set_state() Jani Nikula
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=87lhzj1n47.fsf@intel.com \
--to=jani.nikula@linux.intel.com \
--cc=chris@chris-wilson.co.uk \
--cc=intel-gfx@lists.freedesktop.org \
--cc=stable@vger.kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.