Re: [Qemu-devel] [PATCH 1/2] Fix real mode guest migration

[Anthony Liguori <aliguori@us.ibm.com>]

Paolo Bonzini <pbonzini@redhat.com> writes:

> Il 22/07/2013 08:49, Orit Wasserman ha scritto:
>> Older KVM versions save CS dpl value to an invalid value for real mode guests
>> (0x3). This patch detect this situation when loading CPU state and set all the
>> segments dpl to zero.
>> This will allow migration from older KVM on host without unrestricted guest
>> to hosts with restricted guest support.
>> For example migration from a Penryn host (with kernel 2.6.32) to
>> a Westmere host.
>> 
>> Signed-off-by: Orit Wasserman <owasserm@redhat.com>
>> ---
>>  target-i386/machine.c | 18 ++++++++++++++++++
>>  1 file changed, 18 insertions(+)
>> 
>> diff --git a/target-i386/machine.c b/target-i386/machine.c
>> index 3659db9..7e95829 100644
>> --- a/target-i386/machine.c
>> +++ b/target-i386/machine.c
>> @@ -260,6 +260,24 @@ static int cpu_post_load(void *opaque, int version_id)
>>      CPUX86State *env = &cpu->env;
>>      int i;
>>  
>> +    /*
>> +      Real mode guest segments register DPL should be zero.
>> +      Older KVM version were setting it worngly.
>> +      Fixing it will allow live migration from such host that don't have
>> +      restricted guest support to an host with unrestricted guest support
>> +      (otherwise the migration will fail with invalid guest state
>> +      error).
>> +    */
>
> Coding standard asks for *s on every line.
>
> As discussed offlist, I would prefer to have this in the kernel since
> that's where the bug is.  Gleb disagrees.
>
> We need to find a third person who mediates...  Anthony, Eduardo, what
> do you think?

I can rationalize the post_load part.  We may get garbage state via live
migration, we fix it up.

The pre_save part troubles me though. Is the kernel actively returning
invalid space to userspace?  If so, this needs to be fixed.  That's
clearly a bug.

Or is this expected to work around an old kernel?  If so, is the kernel
advertising that it now handles this state correctly via a capability?
If not, it probably should.

Regards,

Anthony Liguori

>
> Paolo
>
>> +    if (!(env->cr[0] & CR0_PE_MASK) &&
>> +         (env->segs[R_CS].flags >> DESC_DPL_SHIFT & 3) != 0) {
>> +        env->segs[R_CS].flags &= ~(env->segs[R_CS].flags & DESC_DPL_MASK);
>> +        env->segs[R_DS].flags &= ~(env->segs[R_DS].flags & DESC_DPL_MASK);
>> +        env->segs[R_ES].flags &= ~(env->segs[R_ES].flags & DESC_DPL_MASK);
>> +        env->segs[R_FS].flags &= ~(env->segs[R_FS].flags & DESC_DPL_MASK);
>> +        env->segs[R_GS].flags &= ~(env->segs[R_GS].flags & DESC_DPL_MASK);
>> +        env->segs[R_SS].flags &= ~(env->segs[R_SS].flags & DESC_DPL_MASK);
>> +    }
>> +
>>      /* XXX: restore FPU round state */
>>      env->fpstt = (env->fpus_vmstate >> 11) & 7;
>>      env->fpus = env->fpus_vmstate & ~0x3800;
>>