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From: Arnaud Patard (Rtp) <arnaud.patard@rtp-net.org>
To: Florian Lohoff <flo@rfc822.org>
Cc: Aurelien Jarno <aurelien@aurel32.net>, linux-mips@linux-mips.org
Subject: Re: Syncing CPU caches from userland on MIPS
Date: Wed, 25 Nov 2009 15:48:16 +0100	[thread overview]
Message-ID: <87ljhuacen.fsf@lechat.rtp-net.org> (raw)
In-Reply-To: <20091125143232.GH13938@paradigm.rfc822.org> (Florian Lohoff's message of "Wed\, 25 Nov 2009 15\:32\:32 +0100")

Florian Lohoff <flo@rfc822.org> writes:

> On Wed, Nov 25, 2009 at 03:39:01PM +0100, Arnaud Patard wrote:
>> > Would this only evict stuff from the ICACHE? When trying to execute
>> > a just written buffer and with a writeback DCACHE you would need to 
>> > explicitly writeback the DCACHE to memory and invalidate the ICACHE.
>> 
>> we already though about using BCACHE instead of ICACHE only but it
>> didn't make any difference. the bug is still there.
>
> My understanding is you need both ...
>
> FLUSH/WRITEBACK the dcache and INVALIDATE the icache - the icache needs
> to load the data which is in the dcache via memory.

I undertstood that using BCACHE would be better but still, it doesn't
solve our issue. Can we please go ahead ? :)

Arnaud

  reply	other threads:[~2009-11-25 14:39 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2009-11-24 18:28 Syncing CPU caches from userland on MIPS Aurelien Jarno
2009-11-24 21:04 ` David Daney
2009-11-24 21:35   ` Aurelien Jarno
2009-11-25 14:01 ` Florian Lohoff
2009-11-25 14:39   ` Arnaud Patard
2009-11-25 14:32     ` Florian Lohoff
2009-11-25 14:48       ` Arnaud Patard [this message]
2009-11-25 15:18         ` peter fuerst
2009-11-25 15:01     ` Ralf Baechle
2009-11-25 15:00   ` Ralf Baechle

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