From: Miquel Raynal <miquel.raynal@bootlin.com>
To: James Hilliard <james.hilliard1@gmail.com>
Cc: "Greg Kroah-Hartman" <gregkh@linuxfoundation.org>,
"Jiri Slaby" <jirislaby@kernel.org>,
"Raul E Rangel" <rrangel@chromium.org>,
"Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>,
"Andy Shevchenko" <andriy.shevchenko@linux.intel.com>,
"Heikki Krogerus" <heikki.krogerus@linux.intel.com>,
linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org,
stable@vger.kernel.org
Subject: Re: [PATCH v2] serial: 8250: calculate TX length before preparing DMA flow control
Date: Fri, 23 Oct 2026 17:49:52 +0200 [thread overview]
Message-ID: <87mrs4o1r3.fsf@bootlin.com> (raw)
In-Reply-To: <20261023-submit-serial-8250-dma-tx-length-v1-v2-1-c3106ef4d2df@gmail.com> (James Hilliard's message of "Fri, 23 Oct 2026 09:40:50 -0600")
On 23/10/2026 at 09:40:50 -06, James Hilliard <james.hilliard1@gmail.com> wrote:
> The Renesas RZ/N1 preparation hook programs the UART DMA block size from
> dma->tx_size. The generic TX path calls that hook before calculating the
> length of the new transfer, so it programs zero on the first transfer and
> the previous length on subsequent transfers.
>
> Calculate the scatterlist length before calling the preparation hook so
> the UART flow controller and DMA descriptor use the same transfer size.
>
> Fixes: 1788cf6a91d9 ("tty: serial: switch from circ_buf to kfifo")
> Cc: stable@vger.kernel.org
> Signed-off-by: James Hilliard <james.hilliard1@gmail.com>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
next prev parent reply other threads:[~2026-10-23 15:50 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-23 15:40 [PATCH v2] serial: 8250: calculate TX length before preparing DMA flow control James Hilliard
2026-10-23 15:49 ` Miquel Raynal [this message]
2026-10-23 15:52 ` sashiko-bot
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