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Tue, 21 Mar 2023 08:20:25 -0400 X-MC-Unique: lAZJaAUDObu7HARAKXg15A-1 Received: from smtp.corp.redhat.com (int-mx04.intmail.prod.int.rdu2.redhat.com [10.11.54.4]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id 7EBE3101A550; Tue, 21 Mar 2023 12:20:25 +0000 (UTC) Received: from localhost (unknown [10.39.193.206]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 3D9BD2027047; Tue, 21 Mar 2023 12:20:25 +0000 (UTC) From: Cornelia Huck To: Peter Maydell Cc: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: Re: [PATCH for-8.0] docs/system/arm/cpu-features.rst: Fix formatting In-Reply-To: Organization: Red Hat GmbH References: <20230316105808.1414003-1-peter.maydell@linaro.org> <87h6ul0x4m.fsf@redhat.com> User-Agent: Notmuch/0.37 (https://notmuchmail.org) Date: Tue, 21 Mar 2023 13:20:23 +0100 Message-ID: <87mt46mh2w.fsf@redhat.com> MIME-Version: 1.0 Content-Type: text/plain X-Scanned-By: MIMEDefang 3.1 on 10.11.54.4 Received-SPF: pass client-ip=170.10.129.124; envelope-from=cohuck@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-arm@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-arm-bounces+alex.bennee=linaro.org@nongnu.org Sender: qemu-arm-bounces+alex.bennee=linaro.org@nongnu.org X-TUID: VZqZoD2dF4F3 On Tue, Mar 21 2023, Peter Maydell wrote: > On Thu, 16 Mar 2023 at 11:41, Peter Maydell wrote: >> >> On Thu, 16 Mar 2023 at 11:11, Cornelia Huck wrote: >> > >> > On Thu, Mar 16 2023, Peter Maydell wrote: >> > >> > > The markup for the Arm CPU feature documentation is incorrect, >> > > and results in the HTML not rendering correctly -- the first >> > > line of each description is rendered in boldface as if it >> > > were part of the option name. >> > > >> > > Reformat to match the styling used in cpu-models-x86.rst.inc. >> > > >> > > Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1479 >> > > Signed-off-by: Peter Maydell >> > > --- >> > > docs/system/arm/cpu-features.rst | 68 ++++++++++++++------------------ >> > > 1 file changed, 30 insertions(+), 38 deletions(-) >> > >> > (...) >> > >> > > @@ -217,16 +210,15 @@ TCG VCPU Features >> > > TCG VCPU features are CPU features that are specific to TCG. >> > > Below is the list of TCG VCPU features and their descriptions. >> > > >> > > - pauth-impdef When ``FEAT_Pauth`` is enabled, either the >> > > - *impdef* (Implementation Defined) algorithm >> > > - is enabled or the *architected* QARMA algorithm >> > > - is enabled. By default the impdef algorithm >> > > - is disabled, and QARMA is enabled. >> > > +``pauth-impdef`` >> > > + When ``FEAT_Pauth`` is enabled, either the *impdef* (Implementation >> > > + Defined) algorithm is enabled or the *architected* QARMA algorithm >> > > + is enabled. By default the impdef algorithm is disabled, and QARMA >> > > + is enabled. >> > > >> > > - The architected QARMA algorithm has good >> > > - cryptographic properties, but can be quite slow >> > > - to emulate. The impdef algorithm used by QEMU >> > > - is non-cryptographic but significantly faster. >> > > + The architected QARMA algorithm has good ryptographic properties, >> > >> > You dropped a 'c' here ----------------------^ >> >> Well spotted... > > There weren't any review comments other than the typo, so I'm going > to fix that and apply to target-arm.next. In that case, please also add my Reviewed-by: Cornelia Huck