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From: Jani Nikula <jani.nikula@intel.com>
To: Suraj Kandpal <suraj.kandpal@intel.com>, intel-gfx@lists.freedesktop.org
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>,
	Tomas Winkler <tomas.winkler@intel.com>
Subject: Re: [Intel-gfx] [PATCH v5 2/7] drm/i915/hdcp: Keep cp fw agonstic naming convention
Date: Wed, 04 Jan 2023 11:49:55 +0200	[thread overview]
Message-ID: <87mt6yy6gs.fsf@intel.com> (raw)
In-Reply-To: <87r0way6id.fsf@intel.com>

On Wed, 04 Jan 2023, Jani Nikula <jani.nikula@intel.com> wrote:
> On Mon, 02 Jan 2023, Suraj Kandpal <suraj.kandpal@intel.com> wrote:
>> From: Anshuman Gupta <anshuman.gupta@intel.com>
>>
>> Change the include/drm/i915_mei_hdcp_interface.h to
>> include/drm/i915_hdcp_interface.h
>
> This breaks the build, because you rename struct members but don't
> rename the users. Every commit needs to be self-contained.
>
> Please always build each commit before submitting, for example:
>
> $ git rebase $baseline --exec="make -j$(nproc)"
>
> where $baseline is the baseline, e.g. drm-tip.

Also, please fix "cp fw agonstic" in the subject.


>
>
> BR,
> Jani.
>
>>
>> Cc: Tomas Winkler <tomas.winkler@intel.com>
>> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
>> Cc: Uma Shankar <uma.shankar@intel.com>
>> Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
>> Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
>> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
>> Acked-by: Tomas Winkler <tomas.winkler@intel.com>
>> ---
>>  .../drm/i915/display/intel_display_types.h    |  2 +-
>>  drivers/misc/mei/hdcp/mei_hdcp.c              |  2 +-
>>  ...hdcp_interface.h => i915_hdcp_interface.h} | 86 +++++++++----------
>>  3 files changed, 45 insertions(+), 45 deletions(-)
>>  rename include/drm/{i915_mei_hdcp_interface.h => i915_hdcp_interface.h} (75%)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
>> index 32e8b2fc3cc6..81d195ef5e57 100644
>> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
>> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
>> @@ -43,7 +43,7 @@
>>  #include <drm/drm_rect.h>
>>  #include <drm/drm_vblank.h>
>>  #include <drm/drm_vblank_work.h>
>> -#include <drm/i915_mei_hdcp_interface.h>
>> +#include <drm/i915_hdcp_interface.h>
>>  #include <media/cec-notifier.h>
>>  
>>  #include "i915_vma.h"
>> diff --git a/drivers/misc/mei/hdcp/mei_hdcp.c b/drivers/misc/mei/hdcp/mei_hdcp.c
>> index e889a8bd7ac8..cbad27511899 100644
>> --- a/drivers/misc/mei/hdcp/mei_hdcp.c
>> +++ b/drivers/misc/mei/hdcp/mei_hdcp.c
>> @@ -23,7 +23,7 @@
>>  #include <linux/component.h>
>>  #include <drm/drm_connector.h>
>>  #include <drm/i915_component.h>
>> -#include <drm/i915_mei_hdcp_interface.h>
>> +#include <drm/i915_hdcp_interface.h>
>>  
>>  #include "mei_hdcp.h"
>>  
>> diff --git a/include/drm/i915_mei_hdcp_interface.h b/include/drm/i915_hdcp_interface.h
>> similarity index 75%
>> rename from include/drm/i915_mei_hdcp_interface.h
>> rename to include/drm/i915_hdcp_interface.h
>> index f441cbcd95a4..d24f6726e50c 100644
>> --- a/include/drm/i915_mei_hdcp_interface.h
>> +++ b/include/drm/i915_hdcp_interface.h
>> @@ -6,8 +6,8 @@
>>   * Ramalingam C <ramalingam.c@intel.com>
>>   */
>>  
>> -#ifndef _I915_MEI_HDCP_INTERFACE_H_
>> -#define _I915_MEI_HDCP_INTERFACE_H_
>> +#ifndef _I915_HDCP_INTERFACE_H_
>> +#define _I915_HDCP_INTERFACE_H_
>>  
>>  #include <linux/mutex.h>
>>  #include <linux/device.h>
>> @@ -41,44 +41,44 @@ enum hdcp_wired_protocol {
>>  	HDCP_PROTOCOL_DP
>>  };
>>  
>> -enum mei_fw_ddi {
>> -	MEI_DDI_INVALID_PORT = 0x0,
>> +enum hdcp_ddi {
>> +	HDCP_DDI_INVALID_PORT = 0x0,
>>  
>> -	MEI_DDI_B = 1,
>> -	MEI_DDI_C,
>> -	MEI_DDI_D,
>> -	MEI_DDI_E,
>> -	MEI_DDI_F,
>> -	MEI_DDI_A = 7,
>> -	MEI_DDI_RANGE_END = MEI_DDI_A,
>> +	HDCP_DDI_B = 1,
>> +	HDCP_DDI_C,
>> +	HDCP_DDI_D,
>> +	HDCP_DDI_E,
>> +	HDCP_DDI_F,
>> +	HDCP_DDI_A = 7,
>> +	HDCP_DDI_RANGE_END = HDCP_DDI_A,
>>  };
>>  
>>  /**
>> - * enum mei_fw_tc - ME Firmware defined index for transcoders
>> - * @MEI_INVALID_TRANSCODER: Index for Invalid transcoder
>> - * @MEI_TRANSCODER_EDP: Index for EDP Transcoder
>> - * @MEI_TRANSCODER_DSI0: Index for DSI0 Transcoder
>> - * @MEI_TRANSCODER_DSI1: Index for DSI1 Transcoder
>> - * @MEI_TRANSCODER_A: Index for Transcoder A
>> - * @MEI_TRANSCODER_B: Index for Transcoder B
>> - * @MEI_TRANSCODER_C: Index for Transcoder C
>> - * @MEI_TRANSCODER_D: Index for Transcoder D
>> + * enum hdcp_tc - ME Firmware defined index for transcoders
>> + * @HDCP_INVALID_TRANSCODER: Index for Invalid transcoder
>> + * @HDCP_TRANSCODER_EDP: Index for EDP Transcoder
>> + * @HDCP_TRANSCODER_DSI0: Index for DSI0 Transcoder
>> + * @HDCP_TRANSCODER_DSI1: Index for DSI1 Transcoder
>> + * @HDCP_TRANSCODER_A: Index for Transcoder A
>> + * @HDCP_TRANSCODER_B: Index for Transcoder B
>> + * @HDCP_TRANSCODER_C: Index for Transcoder C
>> + * @HDCP_TRANSCODER_D: Index for Transcoder D
>>   */
>> -enum mei_fw_tc {
>> -	MEI_INVALID_TRANSCODER = 0x00,
>> -	MEI_TRANSCODER_EDP,
>> -	MEI_TRANSCODER_DSI0,
>> -	MEI_TRANSCODER_DSI1,
>> -	MEI_TRANSCODER_A = 0x10,
>> -	MEI_TRANSCODER_B,
>> -	MEI_TRANSCODER_C,
>> -	MEI_TRANSCODER_D
>> +enum hdcp_transcoder {
>> +	HDCP_INVALID_TRANSCODER = 0x00,
>> +	HDCP_TRANSCODER_EDP,
>> +	HDCP_TRANSCODER_DSI0,
>> +	HDCP_TRANSCODER_DSI1,
>> +	HDCP_TRANSCODER_A = 0x10,
>> +	HDCP_TRANSCODER_B,
>> +	HDCP_TRANSCODER_C,
>> +	HDCP_TRANSCODER_D
>>  };
>>  
>>  /**
>>   * struct hdcp_port_data - intel specific HDCP port data
>> - * @fw_ddi: ddi index as per ME FW
>> - * @fw_tc: transcoder index as per ME FW
>> + * @hdcp_ddi: ddi index as per ME FW
>> + * @hdcp_transcoder: transcoder index as per ME FW
>>   * @port_type: HDCP port type as per ME FW classification
>>   * @protocol: HDCP adaptation as per ME FW
>>   * @k: No of streams transmitted on a port. Only on DP MST this is != 1
>> @@ -90,8 +90,8 @@ enum mei_fw_tc {
>>   *	     streams
>>   */
>>  struct hdcp_port_data {
>> -	enum mei_fw_ddi fw_ddi;
>> -	enum mei_fw_tc fw_tc;
>> +	enum hdcp_ddi hdcp_ddi;
>> +	enum hdcp_transcoder hdcp_transcoder;
>>  	u8 port_type;
>>  	u8 protocol;
>>  	u16 k;
>> @@ -100,7 +100,7 @@ struct hdcp_port_data {
>>  };
>>  
>>  /**
>> - * struct i915_hdcp_component_ops- ops for HDCP2.2 services.
>> + * struct i915_hdcp_ops- ops for HDCP2.2 services.
>>   * @owner: Module providing the ops
>>   * @initiate_hdcp2_session: Initiate a Wired HDCP2.2 Tx Session.
>>   *			    And Prepare AKE_Init.
>> @@ -119,9 +119,9 @@ struct hdcp_port_data {
>>   * @close_hdcp_session: Close the Wired HDCP Tx session per port.
>>   *			This also disables the authenticated state of the port.
>>   */
>> -struct i915_hdcp_component_ops {
>> +struct i915_hdcp_ops {
>>  	/**
>> -	 * @owner: mei_hdcp module
>> +	 * @owner: hdcp module
>>  	 */
>>  	struct module *owner;
>>  
>> @@ -169,16 +169,16 @@ struct i915_hdcp_component_ops {
>>  
>>  /**
>>   * struct i915_hdcp_component_master - Used for communication between i915
>> - * and mei_hdcp drivers for the HDCP2.2 services
>> - * @mei_dev: device that provide the HDCP2.2 service from MEI Bus.
>> - * @hdcp_ops: Ops implemented by mei_hdcp driver, used by i915 driver.
>> + * and hdcp drivers for the HDCP2.2 services
>> + * @hdcp_dev: device that provide the HDCP2.2 service from MEI Bus.
>> + * @hdcp_ops: Ops implemented by hdcp driver or intel_hdcp_gsc , used by i915 driver.
>>   */
>> -struct i915_hdcp_comp_master {
>> -	struct device *mei_dev;
>> -	const struct i915_hdcp_component_ops *ops;
>> +struct i915_hdcp_master {
>> +	struct device *hdcp_dev;
>> +	const struct i915_hdcp_ops *ops;
>>  
>>  	/* To protect the above members. */
>>  	struct mutex mutex;
>>  };
>>  
>> -#endif /* _I915_MEI_HDCP_INTERFACE_H_ */
>> +#endif /* _I915_HDCP_INTERFACE_H_ */

-- 
Jani Nikula, Intel Open Source Graphics Center

  reply	other threads:[~2023-01-04  9:50 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-01-02  5:40 [Intel-gfx] [PATCH v5 0/7] Enable HDCP2.x via GSC CS Suraj Kandpal
2023-01-02  5:40 ` [Intel-gfx] [PATCH v5 1/7] drm/i915/gsc: Create GSC request submission mechanism Suraj Kandpal
2023-01-02  5:40 ` [Intel-gfx] [PATCH v5 2/7] drm/i915/hdcp: Keep cp fw agonstic naming convention Suraj Kandpal
2023-01-04  9:48   ` Jani Nikula
2023-01-04  9:49     ` Jani Nikula [this message]
2023-01-02  5:40 ` [Intel-gfx] [PATCH v5 3/7] i915/hdcp: HDCP2.x Refactoring to agnostic hdcp Suraj Kandpal
2023-01-02  5:40 ` [Intel-gfx] [PATCH v5 4/7] drm/i915/hdcp: Refactor HDCP API structures Suraj Kandpal
2023-01-02  5:40 ` [Intel-gfx] [PATCH v5 5/7] drm/i915/hdcp: Fill wired_cmd_in structures at a single place Suraj Kandpal
2023-01-04  9:53   ` Jani Nikula
2023-01-04 10:14     ` Tvrtko Ursulin
2023-01-04 11:25       ` Rodrigo Vivi
2023-01-06  3:27         ` Kandpal, Suraj
2023-01-02  5:40 ` [Intel-gfx] [PATCH v5 6/7] drm/i915/mtl: Add function to send command to GSC CS Suraj Kandpal
2023-01-02  5:40 ` [Intel-gfx] [PATCH v5 7/7] drm/i915/mtl: Add HDCP GSC interface Suraj Kandpal
2023-01-04  9:56   ` Jani Nikula
2023-01-02  5:58 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Enable HDCP2.x via GSC CS (rev5) Patchwork
2023-01-02  9:57 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork

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