From: Jani Nikula <jani.nikula@intel.com>
To: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: intel-gfx@lists.freedesktop.org, chris@chris-wilson.co.uk
Subject: Re: [Intel-gfx] [PATCH v3 2/8] drm/i915: split out stepping info to a new file
Date: Wed, 17 Mar 2021 19:02:08 +0200 [thread overview]
Message-ID: <87mtv1ogrz.fsf@intel.com> (raw)
In-Reply-To: <20210309001333.dpvq4z2c5rcahagh@ldmartin-desk1>
On Mon, 08 Mar 2021, Lucas De Marchi <lucas.demarchi@intel.com> wrote:
> On Mon, Mar 08, 2021 at 03:56:39PM +0200, Jani Nikula wrote:
>>gt/intel_workarounds.c is decidedly the wrong place for handling
>>stepping info. Add new intel_step.[ch] for the data, and move the
>>stepping arrays there. No functional changes.
>>
>>v2: Rename stepping->step
>>
>>Signed-off-by: Jani Nikula <jani.nikula@intel.com>
>
>
> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
>
> but what branch is this supposed to go to?
drm-intel-next is the idea.
BR,
Jani.
>
> Lucas De Marchi
>
>>---
>> drivers/gpu/drm/i915/Makefile | 1 +
>> drivers/gpu/drm/i915/gt/intel_workarounds.c | 39 -----------------
>> drivers/gpu/drm/i915/i915_drv.h | 19 +--------
>> drivers/gpu/drm/i915/intel_step.c | 46 +++++++++++++++++++++
>> drivers/gpu/drm/i915/intel_step.h | 25 +++++++++++
>> 5 files changed, 74 insertions(+), 56 deletions(-)
>> create mode 100644 drivers/gpu/drm/i915/intel_step.c
>> create mode 100644 drivers/gpu/drm/i915/intel_step.h
>>
>>diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
>>index bc6138880c67..a9fb426d5e41 100644
>>--- a/drivers/gpu/drm/i915/Makefile
>>+++ b/drivers/gpu/drm/i915/Makefile
>>@@ -53,6 +53,7 @@ i915-y += i915_config.o \
>> intel_pm.o \
>> intel_runtime_pm.o \
>> intel_sideband.o \
>>+ intel_step.o \
>> intel_uncore.o \
>> intel_wakeref.o \
>> vlv_suspend.o
>>diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
>>index 3b4a7da60f0b..2827d4f2e086 100644
>>--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
>>+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
>>@@ -52,45 +52,6 @@
>> * - Public functions to init or apply the given workaround type.
>> */
>>
>>-/*
>>- * KBL revision ID ordering is bizarre; higher revision ID's map to lower
>>- * steppings in some cases. So rather than test against the revision ID
>>- * directly, let's map that into our own range of increasing ID's that we
>>- * can test against in a regular manner.
>>- */
>>-
>>-const struct i915_rev_steppings kbl_revids[] = {
>>- [0] = { .gt_stepping = KBL_REVID_A0, .disp_stepping = KBL_REVID_A0 },
>>- [1] = { .gt_stepping = KBL_REVID_B0, .disp_stepping = KBL_REVID_B0 },
>>- [2] = { .gt_stepping = KBL_REVID_C0, .disp_stepping = KBL_REVID_B0 },
>>- [3] = { .gt_stepping = KBL_REVID_D0, .disp_stepping = KBL_REVID_B0 },
>>- [4] = { .gt_stepping = KBL_REVID_F0, .disp_stepping = KBL_REVID_C0 },
>>- [5] = { .gt_stepping = KBL_REVID_C0, .disp_stepping = KBL_REVID_B1 },
>>- [6] = { .gt_stepping = KBL_REVID_D1, .disp_stepping = KBL_REVID_B1 },
>>- [7] = { .gt_stepping = KBL_REVID_G0, .disp_stepping = KBL_REVID_C0 },
>>-};
>>-
>>-const struct i915_rev_steppings tgl_uy_revid_step_tbl[] = {
>>- [0] = { .gt_stepping = STEP_A0, .disp_stepping = STEP_A0 },
>>- [1] = { .gt_stepping = STEP_B0, .disp_stepping = STEP_C0 },
>>- [2] = { .gt_stepping = STEP_B1, .disp_stepping = STEP_C0 },
>>- [3] = { .gt_stepping = STEP_C0, .disp_stepping = STEP_D0 },
>>-};
>>-
>>-/* Same GT stepping between tgl_uy_revids and tgl_revids don't mean the same HW */
>>-const struct i915_rev_steppings tgl_revid_step_tbl[] = {
>>- [0] = { .gt_stepping = STEP_A0, .disp_stepping = STEP_B0 },
>>- [1] = { .gt_stepping = STEP_B0, .disp_stepping = STEP_D0 },
>>-};
>>-
>>-const struct i915_rev_steppings adls_revid_step_tbl[] = {
>>- [0x0] = { .gt_stepping = STEP_A0, .disp_stepping = STEP_A0 },
>>- [0x1] = { .gt_stepping = STEP_A0, .disp_stepping = STEP_A2 },
>>- [0x4] = { .gt_stepping = STEP_B0, .disp_stepping = STEP_B0 },
>>- [0x8] = { .gt_stepping = STEP_C0, .disp_stepping = STEP_B0 },
>>- [0xC] = { .gt_stepping = STEP_D0, .disp_stepping = STEP_C0 },
>>-};
>>-
>> static void wa_init_start(struct i915_wa_list *wal, const char *name, const char *engine_name)
>> {
>> wal->name = name;
>>diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
>>index 2f511bf2bd82..02170edd6628 100644
>>--- a/drivers/gpu/drm/i915/i915_drv.h
>>+++ b/drivers/gpu/drm/i915/i915_drv.h
>>@@ -86,9 +86,10 @@
>> #include "gt/uc/intel_uc.h"
>>
>> #include "intel_device_info.h"
>>+#include "intel_memory_region.h"
>> #include "intel_pch.h"
>> #include "intel_runtime_pm.h"
>>-#include "intel_memory_region.h"
>>+#include "intel_step.h"
>> #include "intel_uncore.h"
>> #include "intel_wakeref.h"
>> #include "intel_wopcm.h"
>>@@ -1471,14 +1472,6 @@ enum {
>> KBL_REVID_G0,
>> };
>>
>>-struct i915_rev_steppings {
>>- u8 gt_stepping;
>>- u8 disp_stepping;
>>-};
>>-
>>-/* Defined in intel_workarounds.c */
>>-extern const struct i915_rev_steppings kbl_revids[];
>>-
>> #define IS_KBL_GT_REVID(dev_priv, since, until) \
>> (IS_KABYLAKE(dev_priv) && \
>> kbl_revids[INTEL_REVID(dev_priv)].gt_stepping >= since && \
>>@@ -1527,14 +1520,6 @@ enum {
>> STEP_D0,
>> };
>>
>>-#define TGL_UY_REVID_STEP_TBL_SIZE 4
>>-#define TGL_REVID_STEP_TBL_SIZE 2
>>-#define ADLS_REVID_STEP_TBL_SIZE 13
>>-
>>-extern const struct i915_rev_steppings tgl_uy_revid_step_tbl[TGL_UY_REVID_STEP_TBL_SIZE];
>>-extern const struct i915_rev_steppings tgl_revid_step_tbl[TGL_REVID_STEP_TBL_SIZE];
>>-extern const struct i915_rev_steppings adls_revid_step_tbl[ADLS_REVID_STEP_TBL_SIZE];
>>-
>> static inline const struct i915_rev_steppings *
>> tgl_stepping_get(struct drm_i915_private *dev_priv)
>> {
>>diff --git a/drivers/gpu/drm/i915/intel_step.c b/drivers/gpu/drm/i915/intel_step.c
>>new file mode 100644
>>index 000000000000..e19820cbe8e3
>>--- /dev/null
>>+++ b/drivers/gpu/drm/i915/intel_step.c
>>@@ -0,0 +1,46 @@
>>+// SPDX-License-Identifier: MIT
>>+/*
>>+ * Copyright © 2020,2021 Intel Corporation
>>+ */
>>+
>>+#include "i915_drv.h"
>>+#include "intel_step.h"
>>+
>>+/*
>>+ * KBL revision ID ordering is bizarre; higher revision ID's map to lower
>>+ * steppings in some cases. So rather than test against the revision ID
>>+ * directly, let's map that into our own range of increasing ID's that we
>>+ * can test against in a regular manner.
>>+ */
>>+
>>+const struct i915_rev_steppings kbl_revids[] = {
>>+ [0] = { .gt_stepping = KBL_REVID_A0, .disp_stepping = KBL_REVID_A0 },
>>+ [1] = { .gt_stepping = KBL_REVID_B0, .disp_stepping = KBL_REVID_B0 },
>>+ [2] = { .gt_stepping = KBL_REVID_C0, .disp_stepping = KBL_REVID_B0 },
>>+ [3] = { .gt_stepping = KBL_REVID_D0, .disp_stepping = KBL_REVID_B0 },
>>+ [4] = { .gt_stepping = KBL_REVID_F0, .disp_stepping = KBL_REVID_C0 },
>>+ [5] = { .gt_stepping = KBL_REVID_C0, .disp_stepping = KBL_REVID_B1 },
>>+ [6] = { .gt_stepping = KBL_REVID_D1, .disp_stepping = KBL_REVID_B1 },
>>+ [7] = { .gt_stepping = KBL_REVID_G0, .disp_stepping = KBL_REVID_C0 },
>>+};
>>+
>>+const struct i915_rev_steppings tgl_uy_revid_step_tbl[] = {
>>+ [0] = { .gt_stepping = STEP_A0, .disp_stepping = STEP_A0 },
>>+ [1] = { .gt_stepping = STEP_B0, .disp_stepping = STEP_C0 },
>>+ [2] = { .gt_stepping = STEP_B1, .disp_stepping = STEP_C0 },
>>+ [3] = { .gt_stepping = STEP_C0, .disp_stepping = STEP_D0 },
>>+};
>>+
>>+/* Same GT stepping between tgl_uy_revids and tgl_revids don't mean the same HW */
>>+const struct i915_rev_steppings tgl_revid_step_tbl[] = {
>>+ [0] = { .gt_stepping = STEP_A0, .disp_stepping = STEP_B0 },
>>+ [1] = { .gt_stepping = STEP_B0, .disp_stepping = STEP_D0 },
>>+};
>>+
>>+const struct i915_rev_steppings adls_revid_step_tbl[] = {
>>+ [0x0] = { .gt_stepping = STEP_A0, .disp_stepping = STEP_A0 },
>>+ [0x1] = { .gt_stepping = STEP_A0, .disp_stepping = STEP_A2 },
>>+ [0x4] = { .gt_stepping = STEP_B0, .disp_stepping = STEP_B0 },
>>+ [0x8] = { .gt_stepping = STEP_C0, .disp_stepping = STEP_B0 },
>>+ [0xC] = { .gt_stepping = STEP_D0, .disp_stepping = STEP_C0 },
>>+};
>>diff --git a/drivers/gpu/drm/i915/intel_step.h b/drivers/gpu/drm/i915/intel_step.h
>>new file mode 100644
>>index 000000000000..af922ae3bb4e
>>--- /dev/null
>>+++ b/drivers/gpu/drm/i915/intel_step.h
>>@@ -0,0 +1,25 @@
>>+/* SPDX-License-Identifier: MIT */
>>+/*
>>+ * Copyright © 2020,2021 Intel Corporation
>>+ */
>>+
>>+#ifndef __INTEL_STEP_H__
>>+#define __INTEL_STEP_H__
>>+
>>+#include <linux/types.h>
>>+
>>+struct i915_rev_steppings {
>>+ u8 gt_stepping;
>>+ u8 disp_stepping;
>>+};
>>+
>>+#define TGL_UY_REVID_STEP_TBL_SIZE 4
>>+#define TGL_REVID_STEP_TBL_SIZE 2
>>+#define ADLS_REVID_STEP_TBL_SIZE 13
>>+
>>+extern const struct i915_rev_steppings kbl_revids[];
>>+extern const struct i915_rev_steppings tgl_uy_revid_step_tbl[TGL_UY_REVID_STEP_TBL_SIZE];
>>+extern const struct i915_rev_steppings tgl_revid_step_tbl[TGL_REVID_STEP_TBL_SIZE];
>>+extern const struct i915_rev_steppings adls_revid_step_tbl[ADLS_REVID_STEP_TBL_SIZE];
>>+
>>+#endif /* __INTEL_STEP_H__ */
>>--
>>2.20.1
>>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Jani Nikula, Intel Open Source Graphics Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2021-03-17 17:02 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-08 13:56 [Intel-gfx] [PATCH v3 0/8] drm/i915: refactor KBL/TGL/ADLS stepping scheme Jani Nikula
2021-03-08 13:56 ` [Intel-gfx] [PATCH v3 1/8] drm/i915: remove unused ADLS_REVID_* macros Jani Nikula
2021-03-08 13:56 ` [Intel-gfx] [PATCH v3 2/8] drm/i915: split out stepping info to a new file Jani Nikula
2021-03-09 0:13 ` Lucas De Marchi
2021-03-17 17:02 ` Jani Nikula [this message]
2021-03-08 13:56 ` [Intel-gfx] [PATCH v3 3/8] drm/i915: add new helpers for accessing stepping info Jani Nikula
2021-03-25 20:50 ` Souza, Jose
2021-03-26 8:49 ` Jani Nikula
2021-03-26 13:22 ` Jani Nikula
2021-03-08 13:56 ` [Intel-gfx] [PATCH v3 4/8] drm/i915: switch KBL to the new stepping scheme Jani Nikula
2021-03-25 20:54 ` Souza, Jose
2021-03-08 13:56 ` [Intel-gfx] [PATCH v3 5/8] drm/i915: switch TGL and ADL " Jani Nikula
2021-03-25 20:58 ` Souza, Jose
2021-03-08 13:56 ` [Intel-gfx] [PATCH v3 6/8] drm/i915: rename DISP_STEPPING->DISPLAY_STEP and GT_STEPPING->GT_STEP Jani Nikula
2021-03-08 13:56 ` [Intel-gfx] [PATCH v3 7/8] drm/i915: rename disp_stepping->display_step and gt_stepping->gt_step Jani Nikula
2021-03-08 13:56 ` [Intel-gfx] [PATCH v3 8/8] drm/i915: rename i915_rev_steppings->intel_step_info Jani Nikula
2021-03-25 21:00 ` Souza, Jose
2021-03-08 15:10 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: refactor KBL/TGL/ADLS stepping scheme (rev2) Patchwork
2021-03-08 15:39 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-03-08 22:52 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=87mtv1ogrz.fsf@intel.com \
--to=jani.nikula@intel.com \
--cc=chris@chris-wilson.co.uk \
--cc=intel-gfx@lists.freedesktop.org \
--cc=lucas.demarchi@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.