[PATCH 0/3] hw/arm: sabrelite: Improve emulation fidelity to allow booting upstream U-Boot

[PATCH 0/3] hw/arm: sabrelite: Improve emulation fidelity to allow booting upstream U-Boot

[Bin Meng]

From: Bin Meng <bin.meng@windriver.com>

At present the upstream U-Boot (as of today, v2021.01-rc3) does not
boot on QEMU sabrelite machine.

This fixes several issues to improve emulation fidelity of the i.MX6
sabrelite board. With this series, upstream U-Boot can boot to U-Boot
command shell.


Bin Meng (3):
  hw/misc: imx6_ccm: Update PMU_MISC0 reset value
  hw/msic: imx6_ccm: Correct register value for silicon type
  hw/arm: sabrelite: Connect the Ethernet PHY at address 6

 hw/arm/sabrelite.c | 4 ++++
 hw/misc/imx6_ccm.c | 4 ++--
 2 files changed, 6 insertions(+), 2 deletions(-)

-- 
2.7.4

[PATCH 1/3] hw/misc: imx6_ccm: Update PMU_MISC0 reset value

[Bin Meng]

From: Bin Meng <bin.meng@windriver.com>

U-Boot expects PMU_MISC0 register bit 7 is set (see init_bandgap()
in arch/arm/mach-imx/mx6/soc.c) during boot. This bit indicates the
bandgap has stabilized.

With this change, the latest upstream U-Boot (v2021.01-rc3) for imx6
sabrelite board (mx6qsabrelite_defconfig), with a slight change made
by switching CONFIG_OF_SEPARATE to CONFIG_OF_EMBED, boots to U-Boot
shell on QEMU with the following command:

$ qemu-system-arm -M sabrelite -m 1G -kernel u-boot -display none \
    -serial null -serial stdio

Boot log below:

  U-Boot 2021.01-rc3 (Dec 12 2020 - 17:40:02 +0800)

  CPU:   Freescale i.MX?? rev1.0 at 792 MHz
  Reset cause: POR
  Model: Freescale i.MX6 Quad SABRE Lite Board
  Board: SABRE Lite
  I2C:   ready
  DRAM:  1 GiB
  force_idle_bus: sda=0 scl=0 sda.gp=0x5c scl.gp=0x55
  force_idle_bus: failed to clear bus, sda=0 scl=0
  force_idle_bus: sda=0 scl=0 sda.gp=0x6d scl.gp=0x6c
  force_idle_bus: failed to clear bus, sda=0 scl=0
  force_idle_bus: sda=0 scl=0 sda.gp=0xcb scl.gp=0x5
  force_idle_bus: failed to clear bus, sda=0 scl=0
  MMC:   FSL_SDHC: 0, FSL_SDHC: 1
  Loading Environment from MMC... *** Warning - No block device, using default environment

  In:    serial
  Out:   serial
  Err:   serial
  Net:   Board Net Initialization Failed
  No ethernet found.
  starting USB...
  Bus usb@2184000: usb dr_mode not found
  USB EHCI 1.00
  Bus usb@2184200: USB EHCI 1.00
  scanning bus usb@2184000 for devices... 1 USB Device(s) found
  scanning bus usb@2184200 for devices... 1 USB Device(s) found
         scanning usb for storage devices... 0 Storage Device(s) found
         scanning usb for ethernet devices... 0 Ethernet Device(s) found
  Hit any key to stop autoboot:  0
  =>

Signed-off-by: Bin Meng <bin.meng@windriver.com>
---

 hw/misc/imx6_ccm.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/hw/misc/imx6_ccm.c b/hw/misc/imx6_ccm.c
index cb74042..7e031b6 100644
--- a/hw/misc/imx6_ccm.c
+++ b/hw/misc/imx6_ccm.c
@@ -450,7 +450,7 @@ static void imx6_ccm_reset(DeviceState *dev)
     s->analog[PMU_REG_3P0] = 0x00000F74;
     s->analog[PMU_REG_2P5] = 0x00005071;
     s->analog[PMU_REG_CORE] = 0x00402010;
-    s->analog[PMU_MISC0] = 0x04000000;
+    s->analog[PMU_MISC0] = 0x04000080;
     s->analog[PMU_MISC1] = 0x00000000;
     s->analog[PMU_MISC2] = 0x00272727;
 
-- 
2.7.4

Re: [PATCH 1/3] hw/misc: imx6_ccm: Update PMU_MISC0 reset value

[Alex Bennée]

Bin Meng <bmeng.cn@gmail.com> writes:

> From: Bin Meng <bin.meng@windriver.com>
>
> U-Boot expects PMU_MISC0 register bit 7 is set (see init_bandgap()
> in arch/arm/mach-imx/mx6/soc.c) during boot. This bit indicates the
> bandgap has stabilized.
>
> With this change, the latest upstream U-Boot (v2021.01-rc3) for imx6
> sabrelite board (mx6qsabrelite_defconfig), with a slight change made
> by switching CONFIG_OF_SEPARATE to CONFIG_OF_EMBED, boots to U-Boot
> shell on QEMU with the following command:
>
> $ qemu-system-arm -M sabrelite -m 1G -kernel u-boot -display none \
>     -serial null -serial stdio
>
> Boot log below:
>
>   U-Boot 2021.01-rc3 (Dec 12 2020 - 17:40:02 +0800)
>
>   CPU:   Freescale i.MX?? rev1.0 at 792 MHz
>   Reset cause: POR
>   Model: Freescale i.MX6 Quad SABRE Lite Board
>   Board: SABRE Lite
>   I2C:   ready
>   DRAM:  1 GiB
>   force_idle_bus: sda=0 scl=0 sda.gp=0x5c scl.gp=0x55
>   force_idle_bus: failed to clear bus, sda=0 scl=0
>   force_idle_bus: sda=0 scl=0 sda.gp=0x6d scl.gp=0x6c
>   force_idle_bus: failed to clear bus, sda=0 scl=0
>   force_idle_bus: sda=0 scl=0 sda.gp=0xcb scl.gp=0x5
>   force_idle_bus: failed to clear bus, sda=0 scl=0
>   MMC:   FSL_SDHC: 0, FSL_SDHC: 1
>   Loading Environment from MMC... *** Warning - No block device, using default environment
>
>   In:    serial
>   Out:   serial
>   Err:   serial
>   Net:   Board Net Initialization Failed
>   No ethernet found.
>   starting USB...
>   Bus usb@2184000: usb dr_mode not found
>   USB EHCI 1.00
>   Bus usb@2184200: USB EHCI 1.00
>   scanning bus usb@2184000 for devices... 1 USB Device(s) found
>   scanning bus usb@2184200 for devices... 1 USB Device(s) found
>          scanning usb for storage devices... 0 Storage Device(s) found
>          scanning usb for ethernet devices... 0 Ethernet Device(s) found
>   Hit any key to stop autoboot:  0
>   =>
>
> Signed-off-by: Bin Meng <bin.meng@windriver.com>
> ---
>
>  hw/misc/imx6_ccm.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/hw/misc/imx6_ccm.c b/hw/misc/imx6_ccm.c
> index cb74042..7e031b6 100644
> --- a/hw/misc/imx6_ccm.c
> +++ b/hw/misc/imx6_ccm.c
> @@ -450,7 +450,7 @@ static void imx6_ccm_reset(DeviceState *dev)
>      s->analog[PMU_REG_3P0] = 0x00000F74;
>      s->analog[PMU_REG_2P5] = 0x00005071;
>      s->analog[PMU_REG_CORE] = 0x00402010;
> -    s->analog[PMU_MISC0] = 0x04000000;
> +    s->analog[PMU_MISC0] = 0x04000080;

Are the registers different on the imx6ul machine or should a similar
change be made to imx6ul_ccm_reset?

Also what is the write behaviour of this bit? If it is RAO/WI then
analog_mask needs fixing so a write to the register doesn't reset the
state.

>      s->analog[PMU_MISC1] = 0x00000000;
>      s->analog[PMU_MISC2] = 0x00272727;


-- 
Alex Bennée

Re: [PATCH 1/3] hw/misc: imx6_ccm: Update PMU_MISC0 reset value

[Alex Bennée]

Bin Meng <bmeng.cn@gmail.com> writes:

> From: Bin Meng <bin.meng@windriver.com>
>
> U-Boot expects PMU_MISC0 register bit 7 is set (see init_bandgap()
> in arch/arm/mach-imx/mx6/soc.c) during boot. This bit indicates the
> bandgap has stabilized.
>
> With this change, the latest upstream U-Boot (v2021.01-rc3) for imx6
> sabrelite board (mx6qsabrelite_defconfig), with a slight change made
> by switching CONFIG_OF_SEPARATE to CONFIG_OF_EMBED, boots to U-Boot
> shell on QEMU with the following command:
>
> $ qemu-system-arm -M sabrelite -m 1G -kernel u-boot -display none \
>     -serial null -serial stdio
>
> Boot log below:
>
>   U-Boot 2021.01-rc3 (Dec 12 2020 - 17:40:02 +0800)
>
>   CPU:   Freescale i.MX?? rev1.0 at 792 MHz
>   Reset cause: POR
>   Model: Freescale i.MX6 Quad SABRE Lite Board
>   Board: SABRE Lite
>   I2C:   ready
>   DRAM:  1 GiB
>   force_idle_bus: sda=0 scl=0 sda.gp=0x5c scl.gp=0x55
>   force_idle_bus: failed to clear bus, sda=0 scl=0
>   force_idle_bus: sda=0 scl=0 sda.gp=0x6d scl.gp=0x6c
>   force_idle_bus: failed to clear bus, sda=0 scl=0
>   force_idle_bus: sda=0 scl=0 sda.gp=0xcb scl.gp=0x5
>   force_idle_bus: failed to clear bus, sda=0 scl=0
>   MMC:   FSL_SDHC: 0, FSL_SDHC: 1
>   Loading Environment from MMC... *** Warning - No block device, using default environment
>
>   In:    serial
>   Out:   serial
>   Err:   serial
>   Net:   Board Net Initialization Failed
>   No ethernet found.
>   starting USB...
>   Bus usb@2184000: usb dr_mode not found
>   USB EHCI 1.00
>   Bus usb@2184200: USB EHCI 1.00
>   scanning bus usb@2184000 for devices... 1 USB Device(s) found
>   scanning bus usb@2184200 for devices... 1 USB Device(s) found
>          scanning usb for storage devices... 0 Storage Device(s) found
>          scanning usb for ethernet devices... 0 Ethernet Device(s) found
>   Hit any key to stop autoboot:  0
>   =>
>
> Signed-off-by: Bin Meng <bin.meng@windriver.com>
> ---
>
>  hw/misc/imx6_ccm.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/hw/misc/imx6_ccm.c b/hw/misc/imx6_ccm.c
> index cb74042..7e031b6 100644
> --- a/hw/misc/imx6_ccm.c
> +++ b/hw/misc/imx6_ccm.c
> @@ -450,7 +450,7 @@ static void imx6_ccm_reset(DeviceState *dev)
>      s->analog[PMU_REG_3P0] = 0x00000F74;
>      s->analog[PMU_REG_2P5] = 0x00005071;
>      s->analog[PMU_REG_CORE] = 0x00402010;
> -    s->analog[PMU_MISC0] = 0x04000000;
> +    s->analog[PMU_MISC0] = 0x04000080;

Are the registers different on the imx6ul machine or should a similar
change be made to imx6ul_ccm_reset?

Also what is the write behaviour of this bit? If it is RAO/WI then
analog_mask needs fixing so a write to the register doesn't reset the
state.

>      s->analog[PMU_MISC1] = 0x00000000;
>      s->analog[PMU_MISC2] = 0x00272727;


-- 
Alex Bennée

Re: [PATCH 1/3] hw/misc: imx6_ccm: Update PMU_MISC0 reset value

[Bin Meng]

On Mon, Dec 14, 2020 at 6:32 PM Alex Bennée <alex.bennee@linaro.org> wrote:
>
>
> Bin Meng <bmeng.cn@gmail.com> writes:
>
> > From: Bin Meng <bin.meng@windriver.com>
> >
> > U-Boot expects PMU_MISC0 register bit 7 is set (see init_bandgap()
> > in arch/arm/mach-imx/mx6/soc.c) during boot. This bit indicates the
> > bandgap has stabilized.
> >
> > With this change, the latest upstream U-Boot (v2021.01-rc3) for imx6
> > sabrelite board (mx6qsabrelite_defconfig), with a slight change made
> > by switching CONFIG_OF_SEPARATE to CONFIG_OF_EMBED, boots to U-Boot
> > shell on QEMU with the following command:
> >
> > $ qemu-system-arm -M sabrelite -m 1G -kernel u-boot -display none \
> >     -serial null -serial stdio
> >
> > Boot log below:
> >
> >   U-Boot 2021.01-rc3 (Dec 12 2020 - 17:40:02 +0800)
> >
> >   CPU:   Freescale i.MX?? rev1.0 at 792 MHz
> >   Reset cause: POR
> >   Model: Freescale i.MX6 Quad SABRE Lite Board
> >   Board: SABRE Lite
> >   I2C:   ready
> >   DRAM:  1 GiB
> >   force_idle_bus: sda=0 scl=0 sda.gp=0x5c scl.gp=0x55
> >   force_idle_bus: failed to clear bus, sda=0 scl=0
> >   force_idle_bus: sda=0 scl=0 sda.gp=0x6d scl.gp=0x6c
> >   force_idle_bus: failed to clear bus, sda=0 scl=0
> >   force_idle_bus: sda=0 scl=0 sda.gp=0xcb scl.gp=0x5
> >   force_idle_bus: failed to clear bus, sda=0 scl=0
> >   MMC:   FSL_SDHC: 0, FSL_SDHC: 1
> >   Loading Environment from MMC... *** Warning - No block device, using default environment
> >
> >   In:    serial
> >   Out:   serial
> >   Err:   serial
> >   Net:   Board Net Initialization Failed
> >   No ethernet found.
> >   starting USB...
> >   Bus usb@2184000: usb dr_mode not found
> >   USB EHCI 1.00
> >   Bus usb@2184200: USB EHCI 1.00
> >   scanning bus usb@2184000 for devices... 1 USB Device(s) found
> >   scanning bus usb@2184200 for devices... 1 USB Device(s) found
> >          scanning usb for storage devices... 0 Storage Device(s) found
> >          scanning usb for ethernet devices... 0 Ethernet Device(s) found
> >   Hit any key to stop autoboot:  0
> >   =>
> >
> > Signed-off-by: Bin Meng <bin.meng@windriver.com>
> > ---
> >
> >  hw/misc/imx6_ccm.c | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/hw/misc/imx6_ccm.c b/hw/misc/imx6_ccm.c
> > index cb74042..7e031b6 100644
> > --- a/hw/misc/imx6_ccm.c
> > +++ b/hw/misc/imx6_ccm.c
> > @@ -450,7 +450,7 @@ static void imx6_ccm_reset(DeviceState *dev)
> >      s->analog[PMU_REG_3P0] = 0x00000F74;
> >      s->analog[PMU_REG_2P5] = 0x00005071;
> >      s->analog[PMU_REG_CORE] = 0x00402010;
> > -    s->analog[PMU_MISC0] = 0x04000000;
> > +    s->analog[PMU_MISC0] = 0x04000080;
>
> Are the registers different on the imx6ul machine or should a similar
> change be made to imx6ul_ccm_reset?

I am not sure. I did not try the mcimx6ul-evk machine. I only looked
at the i.MX6 DQ reference manual, and current user in QEMU of this
imx6_ccm is only the sabrelite machine.

>
> Also what is the write behaviour of this bit? If it is RAO/WI then
> analog_mask needs fixing so a write to the register doesn't reset the
> state.
>
> >      s->analog[PMU_MISC1] = 0x00000000;
> >      s->analog[PMU_MISC2] = 0x00272727;
>

There is no analog_mask in the imx6_ccm codes. It exists in the
imx6ul_ccm however.

The i.MX6 DQ reference manual says this bit is RW, and does not
document the behavior of write. AFAICT this bit is only concerned by
the bootloader.

Regards,
Bin

Re: [PATCH 1/3] hw/misc: imx6_ccm: Update PMU_MISC0 reset value

[Bin Meng]

On Mon, Dec 14, 2020 at 6:32 PM Alex Bennée <alex.bennee@linaro.org> wrote:
>
>
> Bin Meng <bmeng.cn@gmail.com> writes:
>
> > From: Bin Meng <bin.meng@windriver.com>
> >
> > U-Boot expects PMU_MISC0 register bit 7 is set (see init_bandgap()
> > in arch/arm/mach-imx/mx6/soc.c) during boot. This bit indicates the
> > bandgap has stabilized.
> >
> > With this change, the latest upstream U-Boot (v2021.01-rc3) for imx6
> > sabrelite board (mx6qsabrelite_defconfig), with a slight change made
> > by switching CONFIG_OF_SEPARATE to CONFIG_OF_EMBED, boots to U-Boot
> > shell on QEMU with the following command:
> >
> > $ qemu-system-arm -M sabrelite -m 1G -kernel u-boot -display none \
> >     -serial null -serial stdio
> >
> > Boot log below:
> >
> >   U-Boot 2021.01-rc3 (Dec 12 2020 - 17:40:02 +0800)
> >
> >   CPU:   Freescale i.MX?? rev1.0 at 792 MHz
> >   Reset cause: POR
> >   Model: Freescale i.MX6 Quad SABRE Lite Board
> >   Board: SABRE Lite
> >   I2C:   ready
> >   DRAM:  1 GiB
> >   force_idle_bus: sda=0 scl=0 sda.gp=0x5c scl.gp=0x55
> >   force_idle_bus: failed to clear bus, sda=0 scl=0
> >   force_idle_bus: sda=0 scl=0 sda.gp=0x6d scl.gp=0x6c
> >   force_idle_bus: failed to clear bus, sda=0 scl=0
> >   force_idle_bus: sda=0 scl=0 sda.gp=0xcb scl.gp=0x5
> >   force_idle_bus: failed to clear bus, sda=0 scl=0
> >   MMC:   FSL_SDHC: 0, FSL_SDHC: 1
> >   Loading Environment from MMC... *** Warning - No block device, using default environment
> >
> >   In:    serial
> >   Out:   serial
> >   Err:   serial
> >   Net:   Board Net Initialization Failed
> >   No ethernet found.
> >   starting USB...
> >   Bus usb@2184000: usb dr_mode not found
> >   USB EHCI 1.00
> >   Bus usb@2184200: USB EHCI 1.00
> >   scanning bus usb@2184000 for devices... 1 USB Device(s) found
> >   scanning bus usb@2184200 for devices... 1 USB Device(s) found
> >          scanning usb for storage devices... 0 Storage Device(s) found
> >          scanning usb for ethernet devices... 0 Ethernet Device(s) found
> >   Hit any key to stop autoboot:  0
> >   =>
> >
> > Signed-off-by: Bin Meng <bin.meng@windriver.com>
> > ---
> >
> >  hw/misc/imx6_ccm.c | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/hw/misc/imx6_ccm.c b/hw/misc/imx6_ccm.c
> > index cb74042..7e031b6 100644
> > --- a/hw/misc/imx6_ccm.c
> > +++ b/hw/misc/imx6_ccm.c
> > @@ -450,7 +450,7 @@ static void imx6_ccm_reset(DeviceState *dev)
> >      s->analog[PMU_REG_3P0] = 0x00000F74;
> >      s->analog[PMU_REG_2P5] = 0x00005071;
> >      s->analog[PMU_REG_CORE] = 0x00402010;
> > -    s->analog[PMU_MISC0] = 0x04000000;
> > +    s->analog[PMU_MISC0] = 0x04000080;
>
> Are the registers different on the imx6ul machine or should a similar
> change be made to imx6ul_ccm_reset?

I am not sure. I did not try the mcimx6ul-evk machine. I only looked
at the i.MX6 DQ reference manual, and current user in QEMU of this
imx6_ccm is only the sabrelite machine.

>
> Also what is the write behaviour of this bit? If it is RAO/WI then
> analog_mask needs fixing so a write to the register doesn't reset the
> state.
>
> >      s->analog[PMU_MISC1] = 0x00000000;
> >      s->analog[PMU_MISC2] = 0x00272727;
>

There is no analog_mask in the imx6_ccm codes. It exists in the
imx6ul_ccm however.

The i.MX6 DQ reference manual says this bit is RW, and does not
document the behavior of write. AFAICT this bit is only concerned by
the bootloader.

Regards,
Bin

Re: [PATCH 1/3] hw/misc: imx6_ccm: Update PMU_MISC0 reset value

[Alex Bennée]

Bin Meng <bmeng.cn@gmail.com> writes:

> On Mon, Dec 14, 2020 at 6:32 PM Alex Bennée <alex.bennee@linaro.org> wrote:
>>
>>
>> Bin Meng <bmeng.cn@gmail.com> writes:
>>
>> > From: Bin Meng <bin.meng@windriver.com>
>> >
>> > U-Boot expects PMU_MISC0 register bit 7 is set (see init_bandgap()
>> > in arch/arm/mach-imx/mx6/soc.c) during boot. This bit indicates the
>> > bandgap has stabilized.
>> >
>> > With this change, the latest upstream U-Boot (v2021.01-rc3) for imx6
>> > sabrelite board (mx6qsabrelite_defconfig), with a slight change made
>> > by switching CONFIG_OF_SEPARATE to CONFIG_OF_EMBED, boots to U-Boot
>> > shell on QEMU with the following command:
>> >
>> > $ qemu-system-arm -M sabrelite -m 1G -kernel u-boot -display none \
>> >     -serial null -serial stdio
>> >
>> > Boot log below:
>> >
>> >   U-Boot 2021.01-rc3 (Dec 12 2020 - 17:40:02 +0800)
>> >
>> >   CPU:   Freescale i.MX?? rev1.0 at 792 MHz
>> >   Reset cause: POR
>> >   Model: Freescale i.MX6 Quad SABRE Lite Board
>> >   Board: SABRE Lite
>> >   I2C:   ready
>> >   DRAM:  1 GiB
>> >   force_idle_bus: sda=0 scl=0 sda.gp=0x5c scl.gp=0x55
>> >   force_idle_bus: failed to clear bus, sda=0 scl=0
>> >   force_idle_bus: sda=0 scl=0 sda.gp=0x6d scl.gp=0x6c
>> >   force_idle_bus: failed to clear bus, sda=0 scl=0
>> >   force_idle_bus: sda=0 scl=0 sda.gp=0xcb scl.gp=0x5
>> >   force_idle_bus: failed to clear bus, sda=0 scl=0
>> >   MMC:   FSL_SDHC: 0, FSL_SDHC: 1
>> >   Loading Environment from MMC... *** Warning - No block device, using default environment
>> >
>> >   In:    serial
>> >   Out:   serial
>> >   Err:   serial
>> >   Net:   Board Net Initialization Failed
>> >   No ethernet found.
>> >   starting USB...
>> >   Bus usb@2184000: usb dr_mode not found
>> >   USB EHCI 1.00
>> >   Bus usb@2184200: USB EHCI 1.00
>> >   scanning bus usb@2184000 for devices... 1 USB Device(s) found
>> >   scanning bus usb@2184200 for devices... 1 USB Device(s) found
>> >          scanning usb for storage devices... 0 Storage Device(s) found
>> >          scanning usb for ethernet devices... 0 Ethernet Device(s) found
>> >   Hit any key to stop autoboot:  0
>> >   =>
>> >
>> > Signed-off-by: Bin Meng <bin.meng@windriver.com>
>> > ---
>> >
>> >  hw/misc/imx6_ccm.c | 2 +-
>> >  1 file changed, 1 insertion(+), 1 deletion(-)
>> >
>> > diff --git a/hw/misc/imx6_ccm.c b/hw/misc/imx6_ccm.c
>> > index cb74042..7e031b6 100644
>> > --- a/hw/misc/imx6_ccm.c
>> > +++ b/hw/misc/imx6_ccm.c
>> > @@ -450,7 +450,7 @@ static void imx6_ccm_reset(DeviceState *dev)
>> >      s->analog[PMU_REG_3P0] = 0x00000F74;
>> >      s->analog[PMU_REG_2P5] = 0x00005071;
>> >      s->analog[PMU_REG_CORE] = 0x00402010;
>> > -    s->analog[PMU_MISC0] = 0x04000000;
>> > +    s->analog[PMU_MISC0] = 0x04000080;
>>
>> Are the registers different on the imx6ul machine or should a similar
>> change be made to imx6ul_ccm_reset?
>
> I am not sure. I did not try the mcimx6ul-evk machine. I only looked
> at the i.MX6 DQ reference manual, and current user in QEMU of this
> imx6_ccm is only the sabrelite machine.
>
>>
>> Also what is the write behaviour of this bit? If it is RAO/WI then
>> analog_mask needs fixing so a write to the register doesn't reset the
>> state.
>>
>> >      s->analog[PMU_MISC1] = 0x00000000;
>> >      s->analog[PMU_MISC2] = 0x00272727;
>>
>
> There is no analog_mask in the imx6_ccm codes. It exists in the
> imx6ul_ccm however.
>
> The i.MX6 DQ reference manual says this bit is RW, and does not
> document the behavior of write. AFAICT this bit is only concerned by
> the bootloader.

My bad - I was grepping for PMU_MISC0. It would be nice to nail down if
there is any similarity between the two instances. Doing a diff between
the two does look pretty similar which makes me wonder if there is scope
for a more generic shared code implementation with a few feature flags.
I suspect that is a more involved job however which is out of scope for
this series.

>
> Regards,
> Bin


-- 
Alex Bennée

Re: [PATCH 1/3] hw/misc: imx6_ccm: Update PMU_MISC0 reset value

[Alex Bennée]

Bin Meng <bmeng.cn@gmail.com> writes:

> On Mon, Dec 14, 2020 at 6:32 PM Alex Bennée <alex.bennee@linaro.org> wrote:
>>
>>
>> Bin Meng <bmeng.cn@gmail.com> writes:
>>
>> > From: Bin Meng <bin.meng@windriver.com>
>> >
>> > U-Boot expects PMU_MISC0 register bit 7 is set (see init_bandgap()
>> > in arch/arm/mach-imx/mx6/soc.c) during boot. This bit indicates the
>> > bandgap has stabilized.
>> >
>> > With this change, the latest upstream U-Boot (v2021.01-rc3) for imx6
>> > sabrelite board (mx6qsabrelite_defconfig), with a slight change made
>> > by switching CONFIG_OF_SEPARATE to CONFIG_OF_EMBED, boots to U-Boot
>> > shell on QEMU with the following command:
>> >
>> > $ qemu-system-arm -M sabrelite -m 1G -kernel u-boot -display none \
>> >     -serial null -serial stdio
>> >
>> > Boot log below:
>> >
>> >   U-Boot 2021.01-rc3 (Dec 12 2020 - 17:40:02 +0800)
>> >
>> >   CPU:   Freescale i.MX?? rev1.0 at 792 MHz
>> >   Reset cause: POR
>> >   Model: Freescale i.MX6 Quad SABRE Lite Board
>> >   Board: SABRE Lite
>> >   I2C:   ready
>> >   DRAM:  1 GiB
>> >   force_idle_bus: sda=0 scl=0 sda.gp=0x5c scl.gp=0x55
>> >   force_idle_bus: failed to clear bus, sda=0 scl=0
>> >   force_idle_bus: sda=0 scl=0 sda.gp=0x6d scl.gp=0x6c
>> >   force_idle_bus: failed to clear bus, sda=0 scl=0
>> >   force_idle_bus: sda=0 scl=0 sda.gp=0xcb scl.gp=0x5
>> >   force_idle_bus: failed to clear bus, sda=0 scl=0
>> >   MMC:   FSL_SDHC: 0, FSL_SDHC: 1
>> >   Loading Environment from MMC... *** Warning - No block device, using default environment
>> >
>> >   In:    serial
>> >   Out:   serial
>> >   Err:   serial
>> >   Net:   Board Net Initialization Failed
>> >   No ethernet found.
>> >   starting USB...
>> >   Bus usb@2184000: usb dr_mode not found
>> >   USB EHCI 1.00
>> >   Bus usb@2184200: USB EHCI 1.00
>> >   scanning bus usb@2184000 for devices... 1 USB Device(s) found
>> >   scanning bus usb@2184200 for devices... 1 USB Device(s) found
>> >          scanning usb for storage devices... 0 Storage Device(s) found
>> >          scanning usb for ethernet devices... 0 Ethernet Device(s) found
>> >   Hit any key to stop autoboot:  0
>> >   =>
>> >
>> > Signed-off-by: Bin Meng <bin.meng@windriver.com>
>> > ---
>> >
>> >  hw/misc/imx6_ccm.c | 2 +-
>> >  1 file changed, 1 insertion(+), 1 deletion(-)
>> >
>> > diff --git a/hw/misc/imx6_ccm.c b/hw/misc/imx6_ccm.c
>> > index cb74042..7e031b6 100644
>> > --- a/hw/misc/imx6_ccm.c
>> > +++ b/hw/misc/imx6_ccm.c
>> > @@ -450,7 +450,7 @@ static void imx6_ccm_reset(DeviceState *dev)
>> >      s->analog[PMU_REG_3P0] = 0x00000F74;
>> >      s->analog[PMU_REG_2P5] = 0x00005071;
>> >      s->analog[PMU_REG_CORE] = 0x00402010;
>> > -    s->analog[PMU_MISC0] = 0x04000000;
>> > +    s->analog[PMU_MISC0] = 0x04000080;
>>
>> Are the registers different on the imx6ul machine or should a similar
>> change be made to imx6ul_ccm_reset?
>
> I am not sure. I did not try the mcimx6ul-evk machine. I only looked
> at the i.MX6 DQ reference manual, and current user in QEMU of this
> imx6_ccm is only the sabrelite machine.
>
>>
>> Also what is the write behaviour of this bit? If it is RAO/WI then
>> analog_mask needs fixing so a write to the register doesn't reset the
>> state.
>>
>> >      s->analog[PMU_MISC1] = 0x00000000;
>> >      s->analog[PMU_MISC2] = 0x00272727;
>>
>
> There is no analog_mask in the imx6_ccm codes. It exists in the
> imx6ul_ccm however.

My bad - I was grepping for PMU_MISC0. It would be nice to nail down if
there is any similarity between the two instances. Doing a diff between
the two does look pretty similar which makes me wonder if there is scope
for a more generic shared code implementation with a few feature flags.
I suspect that is a more involved job however which is out of scope for
this series.

>
> The i.MX6 DQ reference manual says this bit is RW, and does not
> document the behavior of write. AFAICT this bit is only concerned by
> the bootloader.
>
> Regards,
> Bin


-- 
Alex Bennée

[PATCH 2/3] hw/msic: imx6_ccm: Correct register value for silicon type

[Bin Meng]

From: Bin Meng <bin.meng@windriver.com>

Currently when U-Boot boots, it prints "??" for i.MX processor:

  CPU:   Freescale i.MX?? rev1.0 at 792 MHz

The register that was used to determine the silicon type is
undocumented in the latest IMX6DQRM (Rev. 6, 05/2020), but we
can refer to get_cpu_rev() in arch/arm/mach-imx/mx6/soc.c in
the U-Boot source codes that USB_ANALOG_DIGPROG is used.

Update its reset value to indicate i.MX6Q.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
---

 hw/misc/imx6_ccm.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/hw/misc/imx6_ccm.c b/hw/misc/imx6_ccm.c
index 7e031b6..4c830fd 100644
--- a/hw/misc/imx6_ccm.c
+++ b/hw/misc/imx6_ccm.c
@@ -462,7 +462,7 @@ static void imx6_ccm_reset(DeviceState *dev)
     s->analog[USB_ANALOG_USB2_VBUS_DETECT] = 0x00000004;
     s->analog[USB_ANALOG_USB2_CHRG_DETECT] = 0x00000000;
     s->analog[USB_ANALOG_USB2_MISC] = 0x00000002;
-    s->analog[USB_ANALOG_DIGPROG] = 0x00000000;
+    s->analog[USB_ANALOG_DIGPROG] = 0x00630000;
 
     /* all PLLs need to be locked */
     s->analog[CCM_ANALOG_PLL_ARM]   |= CCM_ANALOG_PLL_LOCK;
-- 
2.7.4

[PATCH 3/3] hw/arm: sabrelite: Connect the Ethernet PHY at address 6

[Bin Meng]

From: Bin Meng <bin.meng@windriver.com>

At present, when booting U-Boot on QEMU sabrelite, we see:

  Net:   Board Net Initialization Failed
  No ethernet found.

U-Boot scans PHY at address 4/5/6/7 (see board_eth_init() in the
U-Boot source: board/boundary/nitrogen6x/nitrogen6x.c). On the real
board, the Ethernet PHY is at address 6. Adjust this by updating the
"fec-phy-num" property of the fsl_imx6 SoC object.

With this change, U-Boot sees the PHY but complains MAC address:

  Net:   using phy at 6
  FEC [PRIME]
  Error: FEC address not set.

This is due to U-Boot tries to read the MAC address from the fuse,
which QEMU does not have any valid content filled in. However this
does not prevent the Ethernet from working in QEMU. We just need to
set up the MAC address later in the U-Boot command shell, by:

  => setenv ethaddr 00:11:22:33:44:55

Signed-off-by: Bin Meng <bin.meng@windriver.com>

---

 hw/arm/sabrelite.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/hw/arm/sabrelite.c b/hw/arm/sabrelite.c
index 91d8c43..a3dbf85 100644
--- a/hw/arm/sabrelite.c
+++ b/hw/arm/sabrelite.c
@@ -51,6 +51,10 @@ static void sabrelite_init(MachineState *machine)
 
     s = FSL_IMX6(object_new(TYPE_FSL_IMX6));
     object_property_add_child(OBJECT(machine), "soc", OBJECT(s));
+
+    /* Ethernet PHY address is 6 */
+    object_property_set_int(OBJECT(s), "fec-phy-num", 6, &error_fatal);
+
     qdev_realize(DEVICE(s), NULL, &error_fatal);
 
     memory_region_add_subregion(get_system_memory(), FSL_IMX6_MMDC_ADDR,
-- 
2.7.4

Re: [PATCH 3/3] hw/arm: sabrelite: Connect the Ethernet PHY at address 6

[Alex Bennée]

Bin Meng <bmeng.cn@gmail.com> writes:

> From: Bin Meng <bin.meng@windriver.com>
>
> At present, when booting U-Boot on QEMU sabrelite, we see:
>
>   Net:   Board Net Initialization Failed
>   No ethernet found.
>
> U-Boot scans PHY at address 4/5/6/7 (see board_eth_init() in the
> U-Boot source: board/boundary/nitrogen6x/nitrogen6x.c). On the real
> board, the Ethernet PHY is at address 6. Adjust this by updating the
> "fec-phy-num" property of the fsl_imx6 SoC object.
>
> With this change, U-Boot sees the PHY but complains MAC address:
>
>   Net:   using phy at 6
>   FEC [PRIME]
>   Error: FEC address not set.
>
> This is due to U-Boot tries to read the MAC address from the fuse,
> which QEMU does not have any valid content filled in. However this
> does not prevent the Ethernet from working in QEMU. We just need to
> set up the MAC address later in the U-Boot command shell, by:
>
>   => setenv ethaddr 00:11:22:33:44:55
>
> Signed-off-by: Bin Meng <bin.meng@windriver.com>

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>

As you are giving this board some attention is there any chance you
could be persuaded to add an entry in docs/system/arm (linked from
docs/system/target-arm.rst) to briefly describe the board and what is
known to work and boot on it?

-- 
Alex Bennée

Re: [PATCH 3/3] hw/arm: sabrelite: Connect the Ethernet PHY at address 6

[Alex Bennée]

Bin Meng <bmeng.cn@gmail.com> writes:

> From: Bin Meng <bin.meng@windriver.com>
>
> At present, when booting U-Boot on QEMU sabrelite, we see:
>
>   Net:   Board Net Initialization Failed
>   No ethernet found.
>
> U-Boot scans PHY at address 4/5/6/7 (see board_eth_init() in the
> U-Boot source: board/boundary/nitrogen6x/nitrogen6x.c). On the real
> board, the Ethernet PHY is at address 6. Adjust this by updating the
> "fec-phy-num" property of the fsl_imx6 SoC object.
>
> With this change, U-Boot sees the PHY but complains MAC address:
>
>   Net:   using phy at 6
>   FEC [PRIME]
>   Error: FEC address not set.
>
> This is due to U-Boot tries to read the MAC address from the fuse,
> which QEMU does not have any valid content filled in. However this
> does not prevent the Ethernet from working in QEMU. We just need to
> set up the MAC address later in the U-Boot command shell, by:
>
>   => setenv ethaddr 00:11:22:33:44:55
>
> Signed-off-by: Bin Meng <bin.meng@windriver.com>

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>

As you are giving this board some attention is there any chance you
could be persuaded to add an entry in docs/system/arm (linked from
docs/system/target-arm.rst) to briefly describe the board and what is
known to work and boot on it?

-- 
Alex Bennée

Re: [PATCH 3/3] hw/arm: sabrelite: Connect the Ethernet PHY at address 6

[Bin Meng]

On Mon, Dec 14, 2020 at 6:42 PM Alex Bennée <alex.bennee@linaro.org> wrote:
>
>
> Bin Meng <bmeng.cn@gmail.com> writes:
>
> > From: Bin Meng <bin.meng@windriver.com>
> >
> > At present, when booting U-Boot on QEMU sabrelite, we see:
> >
> >   Net:   Board Net Initialization Failed
> >   No ethernet found.
> >
> > U-Boot scans PHY at address 4/5/6/7 (see board_eth_init() in the
> > U-Boot source: board/boundary/nitrogen6x/nitrogen6x.c). On the real
> > board, the Ethernet PHY is at address 6. Adjust this by updating the
> > "fec-phy-num" property of the fsl_imx6 SoC object.
> >
> > With this change, U-Boot sees the PHY but complains MAC address:
> >
> >   Net:   using phy at 6
> >   FEC [PRIME]
> >   Error: FEC address not set.
> >
> > This is due to U-Boot tries to read the MAC address from the fuse,
> > which QEMU does not have any valid content filled in. However this
> > does not prevent the Ethernet from working in QEMU. We just need to
> > set up the MAC address later in the U-Boot command shell, by:
> >
> >   => setenv ethaddr 00:11:22:33:44:55
> >
> > Signed-off-by: Bin Meng <bin.meng@windriver.com>
>
> Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
>

Thanks for the review.

> As you are giving this board some attention is there any chance you
> could be persuaded to add an entry in docs/system/arm (linked from
> docs/system/target-arm.rst) to briefly describe the board and what is
> known to work and boot on it?

Sure, I will try to add something for this board in v2.

Regards,
Bin

Re: [PATCH 3/3] hw/arm: sabrelite: Connect the Ethernet PHY at address 6

[Bin Meng]

On Mon, Dec 14, 2020 at 6:42 PM Alex Bennée <alex.bennee@linaro.org> wrote:
>
>
> Bin Meng <bmeng.cn@gmail.com> writes:
>
> > From: Bin Meng <bin.meng@windriver.com>
> >
> > At present, when booting U-Boot on QEMU sabrelite, we see:
> >
> >   Net:   Board Net Initialization Failed
> >   No ethernet found.
> >
> > U-Boot scans PHY at address 4/5/6/7 (see board_eth_init() in the
> > U-Boot source: board/boundary/nitrogen6x/nitrogen6x.c). On the real
> > board, the Ethernet PHY is at address 6. Adjust this by updating the
> > "fec-phy-num" property of the fsl_imx6 SoC object.
> >
> > With this change, U-Boot sees the PHY but complains MAC address:
> >
> >   Net:   using phy at 6
> >   FEC [PRIME]
> >   Error: FEC address not set.
> >
> > This is due to U-Boot tries to read the MAC address from the fuse,
> > which QEMU does not have any valid content filled in. However this
> > does not prevent the Ethernet from working in QEMU. We just need to
> > set up the MAC address later in the U-Boot command shell, by:
> >
> >   => setenv ethaddr 00:11:22:33:44:55
> >
> > Signed-off-by: Bin Meng <bin.meng@windriver.com>
>
> Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
>

Thanks for the review.

> As you are giving this board some attention is there any chance you
> could be persuaded to add an entry in docs/system/arm (linked from
> docs/system/target-arm.rst) to briefly describe the board and what is
> known to work and boot on it?

Sure, I will try to add something for this board in v2.

Regards,
Bin

Re: [PATCH 0/3] hw/arm: sabrelite: Improve emulation fidelity to allow booting upstream U-Boot

[Alex Bennée]

Bin Meng <bmeng.cn@gmail.com> writes:

> From: Bin Meng <bin.meng@windriver.com>
>
> At present the upstream U-Boot (as of today, v2021.01-rc3) does not
> boot on QEMU sabrelite machine.

Are there any public build artefacts for u-boot on saberlite that could
be used for an acceptance test?

> This fixes several issues to improve emulation fidelity of the i.MX6
> sabrelite board. With this series, upstream U-Boot can boot to U-Boot
> command shell.
>
>
> Bin Meng (3):
>   hw/misc: imx6_ccm: Update PMU_MISC0 reset value
>   hw/msic: imx6_ccm: Correct register value for silicon type
>   hw/arm: sabrelite: Connect the Ethernet PHY at address 6
>
>  hw/arm/sabrelite.c | 4 ++++
>  hw/misc/imx6_ccm.c | 4 ++--
>  2 files changed, 6 insertions(+), 2 deletions(-)


-- 
Alex Bennée

Re: [PATCH 0/3] hw/arm: sabrelite: Improve emulation fidelity to allow booting upstream U-Boot

[Alex Bennée]

Bin Meng <bmeng.cn@gmail.com> writes:

> From: Bin Meng <bin.meng@windriver.com>
>
> At present the upstream U-Boot (as of today, v2021.01-rc3) does not
> boot on QEMU sabrelite machine.

Are there any public build artefacts for u-boot on saberlite that could
be used for an acceptance test?

> This fixes several issues to improve emulation fidelity of the i.MX6
> sabrelite board. With this series, upstream U-Boot can boot to U-Boot
> command shell.
>
>
> Bin Meng (3):
>   hw/misc: imx6_ccm: Update PMU_MISC0 reset value
>   hw/msic: imx6_ccm: Correct register value for silicon type
>   hw/arm: sabrelite: Connect the Ethernet PHY at address 6
>
>  hw/arm/sabrelite.c | 4 ++++
>  hw/misc/imx6_ccm.c | 4 ++--
>  2 files changed, 6 insertions(+), 2 deletions(-)


-- 
Alex Bennée

Re: [PATCH 0/3] hw/arm: sabrelite: Improve emulation fidelity to allow booting upstream U-Boot

[Bin Meng]

On Mon, Dec 14, 2020 at 6:24 PM Alex Bennée <alex.bennee@linaro.org> wrote:
>
>
> Bin Meng <bmeng.cn@gmail.com> writes:
>
> > From: Bin Meng <bin.meng@windriver.com>
> >
> > At present the upstream U-Boot (as of today, v2021.01-rc3) does not
> > boot on QEMU sabrelite machine.
>
> Are there any public build artefacts for u-boot on saberlite that could
> be used for an acceptance test?

I am not aware of one. Upstream U-Boot has build pipelines but it does
not publish artifacts.

>
> > This fixes several issues to improve emulation fidelity of the i.MX6
> > sabrelite board. With this series, upstream U-Boot can boot to U-Boot
> > command shell.
> >

Regards,
Bin

Re: [PATCH 0/3] hw/arm: sabrelite: Improve emulation fidelity to allow booting upstream U-Boot

[Bin Meng]

On Mon, Dec 14, 2020 at 6:24 PM Alex Bennée <alex.bennee@linaro.org> wrote:
>
>
> Bin Meng <bmeng.cn@gmail.com> writes:
>
> > From: Bin Meng <bin.meng@windriver.com>
> >
> > At present the upstream U-Boot (as of today, v2021.01-rc3) does not
> > boot on QEMU sabrelite machine.
>
> Are there any public build artefacts for u-boot on saberlite that could
> be used for an acceptance test?

I am not aware of one. Upstream U-Boot has build pipelines but it does
not publish artifacts.

>
> > This fixes several issues to improve emulation fidelity of the i.MX6
> > sabrelite board. With this series, upstream U-Boot can boot to U-Boot
> > command shell.
> >

Regards,
Bin