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Sat, 18 Jul 2020 21:07:35 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id DB60E22CF8 for ; Sat, 18 Jul 2020 21:07:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726916AbgGRVHd convert rfc822-to-8bit (ORCPT ); Sat, 18 Jul 2020 17:07:33 -0400 Received: from relay12.mail.gandi.net ([217.70.178.232]:46481 "EHLO relay12.mail.gandi.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726382AbgGRVHd (ORCPT ); Sat, 18 Jul 2020 17:07:33 -0400 Received: from localhost (91-175-115-186.subs.proxad.net [91.175.115.186]) (Authenticated sender: gregory.clement@bootlin.com) by relay12.mail.gandi.net (Postfix) with ESMTPSA id 15AD2200004; Sat, 18 Jul 2020 21:07:29 +0000 (UTC) From: Gregory CLEMENT To: Marcin Wojtas Cc: Rob Herring , Robin Murphy , joro@8bytes.org, Tomasz Nowicki , Hanna Hawa , Catalin Marinas , Will Deacon , kernel-team@android.com, nadavh@marvell.com, iommu@lists.linux-foundation.org, Linux Kernel Mailing List , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH v4 0/4] Add system mmu support for Armada-806 In-Reply-To: References: <20200715070649.18733-1-tn@semihalf.com> <159488817559.3788855.4350396507732052751.b4-ty@kernel.org> <20200716120202.GA7485@willie-the-truck> Date: Sat, 18 Jul 2020 23:07:29 +0200 Message-ID: <87mu3w352m.fsf@FE-laptop> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8BIT Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Hello, > czw., 16 lip 2020 o 14:02 Will Deacon napisał(a): >> >> On Thu, Jul 16, 2020 at 01:00:43PM +0100, Will Deacon wrote: >> > On Wed, 15 Jul 2020 09:06:45 +0200, Tomasz Nowicki wrote: >> > > The series is meant to support SMMU for AP806 and a workaround >> > > for accessing ARM SMMU 64bit registers is the gist of it. >> > > >> > > For the record, AP-806 can't access SMMU registers with 64bit width. >> > > This patches split the readq/writeq into two 32bit accesses instead >> > > and update DT bindings. >> > > >> > > [...] >> > >> > Applied to will (for-joerg/arm-smmu/updates), thanks! >> > >> > [1/3] iommu/arm-smmu: Call configuration impl hook before consuming features >> > https://git.kernel.org/will/c/6a79a5a3842b >> > [2/3] iommu/arm-smmu: Workaround for Marvell Armada-AP806 SoC erratum #582743 >> > https://git.kernel.org/will/c/f2d9848aeb9f >> > [3/3] dt-bindings: arm-smmu: add compatible string for Marvell Armada-AP806 SMMU-500 >> > https://git.kernel.org/will/c/e85e84d19b9d >> >> (note that I left patch 4 for arm-soc, as that's just updating .dts files) >> > > Hi Gregory, > > Can you please help with the review/merge of patch #4? Sure! I've followed the series since the v1 even if I didn't commetn and I am happy that it finally managed to be merged. I can now remove it from my TODO list! :) Gregory > > Best regards, > Marcin -- Gregory Clement, Bootlin Embedded Linux and Kernel engineering http://bootlin.com