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From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/i915: Limit number of reads to stabilize rc6 counter reads
Date: Mon, 27 Mar 2017 13:07:58 +0300	[thread overview]
Message-ID: <87mvc7xcap.fsf@gaia.fi.intel.com> (raw)
In-Reply-To: <20170324165418.7455-1-chris@chris-wilson.co.uk>

Chris Wilson <chris@chris-wilson.co.uk> writes:

> We have only 8bits of precise timestamps in which to complete our
> upper/load reads, along with the switch between precision. This is not
> always enough time to read the upper counter twice within the same time
> slice, leading to hard lockups. Limit the number of times to prevent
> an inifite loop (my fault for assuming we would have no trouble doing
> the write + reads fast enough).
>

We get here only with kasan enabled? Or even without?


> Fixes: 47c21d9a1a7b ("drm/i915: Extend vlv/chv residency resolution")
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100377
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: Mika Kuoppala <mika.kuoppala@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_pm.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index aece0ff88a5d..63ce70329e6e 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -8355,6 +8355,7 @@ static u64 vlv_residency_raw(struct drm_i915_private *dev_priv,
>  			     const i915_reg_t reg)
>  {
>  	u32 lower, upper, tmp;
> +	int loop = 2;

loop could be larger, like 4 but as we very seldom
get a less than usec error, I am fine with this too.

Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>

>  
>  	/* The register accessed do not need forcewake. We borrow
>  	 * uncore lock to prevent concurrent access to range reg.
> @@ -8383,7 +8384,7 @@ static u64 vlv_residency_raw(struct drm_i915_private *dev_priv,
>  		I915_WRITE_FW(VLV_COUNTER_CONTROL,
>  			      _MASKED_BIT_ENABLE(VLV_COUNT_RANGE_HIGH));
>  		upper = I915_READ_FW(reg);
> -	} while (upper != tmp);
> +	} while (upper != tmp && --loop);
>  
>  	/* Everywhere else we always use VLV_COUNTER_CONTROL with the
>  	 * VLV_COUNT_RANGE_HIGH bit set - so it is safe to leave it set
> -- 
> 2.11.0
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  parent reply	other threads:[~2017-03-27 10:08 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-03-24 16:54 [PATCH] drm/i915: Limit number of reads to stabilize rc6 counter reads Chris Wilson
2017-03-24 17:14 ` ✓ Fi.CI.BAT: success for " Patchwork
2017-03-27 10:07 ` Mika Kuoppala [this message]
2017-03-27 10:45   ` [PATCH] " Chris Wilson
2017-03-27 11:30     ` Mika Kuoppala
2017-03-27 12:23   ` Chris Wilson

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