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From: Alex =?utf-8?Q?Benn=C3=A9e?= <alex.bennee@linaro.org>
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Date: Tue, 04 Oct 2016 16:47:57 +0100
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Subject: Re: [Qemu-devel] [PATCH v4 15/35] tcg: Add CONFIG_ATOMIC64
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To: Richard Henderson <rth@twiddle.net>
Cc: qemu-devel@nongnu.org


Richard Henderson <rth@twiddle.net> writes:

> Allow qemu to build on 32-bit hosts without 64-bit atomic ops.
>
> Even if we only allow 32-bit hosts to multi-thread emulate 32-bit
> guests, we still need some way to handle the 32-bit guest using a
> 64-bit atomic operation.  Do so by dropping back to single-step.
>
> Signed-off-by: Richard Henderson <rth@twiddle.net>
> ---
>  configure         | 33 +++++++++++++++++++++++++++++++++
>  cputlb.c          |  4 ++++
>  tcg-runtime.c     |  7 +++++++
>  tcg/tcg-op.c      | 22 ++++++++++++++++++----
>  tcg/tcg-runtime.h | 46 ++++++++++++++++++++++++++++++++++++++++------
>  tcg/tcg.h         | 15 ++++++++++++---
>  6 files changed, 114 insertions(+), 13 deletions(-)
>
> diff --git a/configure b/configure
> index b4d3f90..1ab2e4a 100755
> --- a/configure
> +++ b/configure
> @@ -4479,6 +4479,35 @@ EOF
>    fi
>  fi
>
> +#########################################
> +# See if 64-bit atomic operations are supported.
> +# Note that without __atomic builtins, we can only
> +# assume atomic loads/stores max at pointer size.
> +
> +cat > $TMPC << EOF
> +#include <stdint.h>
> +int main(void)
> +{
> +  uint64_t x = 0, y = 0;
> +#ifdef __ATOMIC_RELAXED
> +  y = __atomic_load_8(&x, 0);
> +  __atomic_store_8(&x, y, 0);
> +  __atomic_compare_exchange_8(&x, &y, x, 0, 0, 0);
> +  __atomic_exchange_8(&x, y, 0);
> +  __atomic_fetch_add_8(&x, y, 0);
> +#else
> +  char is_host64[sizeof(void *) >= sizeof(uint64_t) ? 1 : -1];
<snip>

This breaks with --enable-werror (and my Travis images):

config-temp/qemu-conf.c: In function ‘main’:
config-temp/qemu-conf.c:12:8: error: unused variable ‘is_host64’ [-Werror=unused-variable]

I'm not sure what the best fix is here? Pass -no-werror to the test compile?

--
Alex Bennée