From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 1/3] drm/i915: Amalgamate gen6_mm_switch() and vgpu_mm_switch()
Date: Tue, 05 Jul 2016 12:59:25 +0300 [thread overview]
Message-ID: <87mvlwv20y.fsf@intel.com> (raw)
In-Reply-To: <1467618513-4966-1-git-send-email-chris@chris-wilson.co.uk>
Chris Wilson <chris@chris-wilson.co.uk> writes:
> These are identical, so let's just use the same vfunc.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> ---
> drivers/gpu/drm/i915/i915_gem_gtt.c | 29 +++++------------------------
> 1 file changed, 5 insertions(+), 24 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index 0bb18b88dc7a..fd249f5a82f0 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -1683,17 +1683,6 @@ static int hsw_mm_switch(struct i915_hw_ppgtt *ppgtt,
> return 0;
> }
>
> -static int vgpu_mm_switch(struct i915_hw_ppgtt *ppgtt,
> - struct drm_i915_gem_request *req)
> -{
> - struct intel_engine_cs *engine = req->engine;
> - struct drm_i915_private *dev_priv = to_i915(ppgtt->base.dev);
> -
> - I915_WRITE(RING_PP_DIR_DCLV(engine), PP_DIR_DCLV_2G);
> - I915_WRITE(RING_PP_DIR_BASE(engine), get_pd_offset(ppgtt));
> - return 0;
> -}
> -
> static int gen7_mm_switch(struct i915_hw_ppgtt *ppgtt,
> struct drm_i915_gem_request *req)
> {
> @@ -1731,15 +1720,10 @@ static int gen6_mm_switch(struct i915_hw_ppgtt *ppgtt,
> struct drm_i915_gem_request *req)
> {
> struct intel_engine_cs *engine = req->engine;
> - struct drm_device *dev = ppgtt->base.dev;
> - struct drm_i915_private *dev_priv = dev->dev_private;
> -
> + struct drm_i915_private *dev_priv = req->i915;
>
> I915_WRITE(RING_PP_DIR_DCLV(engine), PP_DIR_DCLV_2G);
> I915_WRITE(RING_PP_DIR_BASE(engine), get_pd_offset(ppgtt));
> -
> - POSTING_READ(RING_PP_DIR_DCLV(engine));
> -
Why is the posting not needed anymore?
-Mika
> return 0;
> }
>
> @@ -2074,18 +2058,15 @@ static int gen6_ppgtt_init(struct i915_hw_ppgtt *ppgtt)
> int ret;
>
> ppgtt->base.pte_encode = ggtt->base.pte_encode;
> - if (IS_GEN6(dev)) {
> + if (intel_vgpu_active(dev_priv) || IS_GEN6(dev))
> ppgtt->switch_mm = gen6_mm_switch;
> - } else if (IS_HASWELL(dev)) {
> + else if (IS_HASWELL(dev))
> ppgtt->switch_mm = hsw_mm_switch;
> - } else if (IS_GEN7(dev)) {
> + else if (IS_GEN7(dev))
> ppgtt->switch_mm = gen7_mm_switch;
> - } else
> + else
> BUG();
>
> - if (intel_vgpu_active(dev_priv))
> - ppgtt->switch_mm = vgpu_mm_switch;
> -
> ret = gen6_ppgtt_alloc(ppgtt);
> if (ret)
> return ret;
> --
> 2.8.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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next prev parent reply other threads:[~2016-07-05 9:59 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-07-04 7:48 [PATCH 1/3] drm/i915: Amalgamate gen6_mm_switch() and vgpu_mm_switch() Chris Wilson
2016-07-04 7:48 ` [PATCH 2/3] drm/i915: Clean up GPU hang message Chris Wilson
2016-07-05 10:01 ` Mika Kuoppala
2016-07-04 7:48 ` [PATCH 3/3] drm/i915: Skip capturing an error state if we already have one Chris Wilson
2016-07-05 10:10 ` Mika Kuoppala
2016-07-05 10:28 ` Chris Wilson
2016-07-04 9:01 ` ✗ Ro.CI.BAT: failure for series starting with [1/3] drm/i915: Amalgamate gen6_mm_switch() and vgpu_mm_switch() Patchwork
2016-07-05 9:59 ` Mika Kuoppala [this message]
2016-07-05 10:04 ` [PATCH 1/3] " Chris Wilson
2016-07-05 10:07 ` Mika Kuoppala
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