* [PATCH] drm/i915: Check for driver readyness before handling an underrun interrupt
@ 2015-02-26 15:53 Chris Wilson
2015-02-27 7:52 ` [Intel-gfx] " Jani Nikula
2015-02-28 19:16 ` shuang.he
0 siblings, 2 replies; 7+ messages in thread
From: Chris Wilson @ 2015-02-26 15:53 UTC (permalink / raw)
To: intel-gfx; +Cc: daniel.vetter, rclark, Chris Wilson, stable
When we takeover from the BIOS and install our interrupt handler, the
BIOS may have left us a few surprises in the form of spontaneous
interrupts. (This is especially likely on hardware like 965gm where
display fifo underruns are continuous and the GMCH cannot filter that
interrupt souce.) As we enable our IRQ early so that we can use it
during hardware probing, our interrupt handler must be prepared to
handle a few sources prior to being fully configured. As such, we need
to add a simple is-ready check prior to dereferencing our KMS state for
reporting underruns.
Reported-by: Rob Clark <rclark@redhat.com>
Bugzilla: https://bugzilla.redhat.com/show_bug.cgi?id=1193972
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: stable@vger.kernel.org
---
drivers/gpu/drm/i915/intel_fifo_underrun.c | 18 +++++++-----------
1 file changed, 7 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_fifo_underrun.c b/drivers/gpu/drm/i915/intel_fifo_underrun.c
index 04e248dd2259..f2fd992e3cd8 100644
--- a/drivers/gpu/drm/i915/intel_fifo_underrun.c
+++ b/drivers/gpu/drm/i915/intel_fifo_underrun.c
@@ -282,16 +282,6 @@ bool intel_set_cpu_fifo_underrun_reporting(struct drm_i915_private *dev_priv,
return ret;
}
-static bool
-__cpu_fifo_underrun_reporting_enabled(struct drm_i915_private *dev_priv,
- enum pipe pipe)
-{
- struct drm_crtc *crtc = dev_priv->pipe_to_crtc_mapping[pipe];
- struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
-
- return !intel_crtc->cpu_fifo_underrun_disabled;
-}
-
/**
* intel_set_pch_fifo_underrun_reporting - set PCH fifo underrun reporting state
* @dev_priv: i915 device instance
@@ -352,9 +342,15 @@ bool intel_set_pch_fifo_underrun_reporting(struct drm_i915_private *dev_priv,
void intel_cpu_fifo_underrun_irq_handler(struct drm_i915_private *dev_priv,
enum pipe pipe)
{
+ struct drm_crtc *crtc = dev_priv->pipe_to_crtc_mapping[pipe];
+
+ /* We may be called too early in init, thanks BIOS! */
+ if (crtc == NULL)
+ return;
+
/* GMCH can't disable fifo underruns, filter them. */
if (HAS_GMCH_DISPLAY(dev_priv->dev) &&
- !__cpu_fifo_underrun_reporting_enabled(dev_priv, pipe))
+ !to_intel_crtc(crtc)->cpu_fifo_underrun_disabled)
return;
if (intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, false))
--
2.1.4
^ permalink raw reply related [flat|nested] 7+ messages in thread* Re: [Intel-gfx] [PATCH] drm/i915: Check for driver readyness before handling an underrun interrupt
2015-02-26 15:53 [PATCH] drm/i915: Check for driver readyness before handling an underrun interrupt Chris Wilson
@ 2015-02-27 7:52 ` Jani Nikula
2015-02-27 8:20 ` Jani Nikula
2015-02-28 19:16 ` shuang.he
1 sibling, 1 reply; 7+ messages in thread
From: Jani Nikula @ 2015-02-27 7:52 UTC (permalink / raw)
To: Chris Wilson, intel-gfx; +Cc: daniel.vetter, rclark, stable
On Thu, 26 Feb 2015, Chris Wilson <chris@chris-wilson.co.uk> wrote:
> When we takeover from the BIOS and install our interrupt handler, the
> BIOS may have left us a few surprises in the form of spontaneous
> interrupts. (This is especially likely on hardware like 965gm where
> display fifo underruns are continuous and the GMCH cannot filter that
> interrupt souce.) As we enable our IRQ early so that we can use it
> during hardware probing, our interrupt handler must be prepared to
> handle a few sources prior to being fully configured. As such, we need
> to add a simple is-ready check prior to dereferencing our KMS state for
> reporting underruns.
>
> Reported-by: Rob Clark <rclark@redhat.com>
> Bugzilla: https://bugzilla.redhat.com/show_bug.cgi?id=1193972
"You are not authorized to access bug #1193972. To see this bug, you
must first log in to an account with the appropriate permissions."
Meh.
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
> Cc: stable@vger.kernel.org
> ---
> drivers/gpu/drm/i915/intel_fifo_underrun.c | 18 +++++++-----------
> 1 file changed, 7 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_fifo_underrun.c b/drivers/gpu/drm/i915/intel_fifo_underrun.c
> index 04e248dd2259..f2fd992e3cd8 100644
> --- a/drivers/gpu/drm/i915/intel_fifo_underrun.c
> +++ b/drivers/gpu/drm/i915/intel_fifo_underrun.c
> @@ -282,16 +282,6 @@ bool intel_set_cpu_fifo_underrun_reporting(struct drm_i915_private *dev_priv,
> return ret;
> }
>
> -static bool
> -__cpu_fifo_underrun_reporting_enabled(struct drm_i915_private *dev_priv,
> - enum pipe pipe)
> -{
> - struct drm_crtc *crtc = dev_priv->pipe_to_crtc_mapping[pipe];
> - struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
> -
> - return !intel_crtc->cpu_fifo_underrun_disabled;
> -}
> -
> /**
> * intel_set_pch_fifo_underrun_reporting - set PCH fifo underrun reporting state
> * @dev_priv: i915 device instance
> @@ -352,9 +342,15 @@ bool intel_set_pch_fifo_underrun_reporting(struct drm_i915_private *dev_priv,
> void intel_cpu_fifo_underrun_irq_handler(struct drm_i915_private *dev_priv,
> enum pipe pipe)
> {
> + struct drm_crtc *crtc = dev_priv->pipe_to_crtc_mapping[pipe];
> +
> + /* We may be called too early in init, thanks BIOS! */
> + if (crtc == NULL)
> + return;
> +
> /* GMCH can't disable fifo underruns, filter them. */
> if (HAS_GMCH_DISPLAY(dev_priv->dev) &&
> - !__cpu_fifo_underrun_reporting_enabled(dev_priv, pipe))
> + !to_intel_crtc(crtc)->cpu_fifo_underrun_disabled)
> return;
>
> if (intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, false))
> --
> 2.1.4
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Jani Nikula, Intel Open Source Technology Center
^ permalink raw reply [flat|nested] 7+ messages in thread* Re: [Intel-gfx] [PATCH] drm/i915: Check for driver readyness before handling an underrun interrupt
2015-02-27 7:52 ` [Intel-gfx] " Jani Nikula
@ 2015-02-27 8:20 ` Jani Nikula
2015-02-27 9:27 ` Chris Wilson
0 siblings, 1 reply; 7+ messages in thread
From: Jani Nikula @ 2015-02-27 8:20 UTC (permalink / raw)
To: Chris Wilson, intel-gfx; +Cc: daniel.vetter, rclark, stable
On Fri, 27 Feb 2015, Jani Nikula <jani.nikula@linux.intel.com> wrote:
> On Thu, 26 Feb 2015, Chris Wilson <chris@chris-wilson.co.uk> wrote:
>> When we takeover from the BIOS and install our interrupt handler, the
>> BIOS may have left us a few surprises in the form of spontaneous
>> interrupts. (This is especially likely on hardware like 965gm where
>> display fifo underruns are continuous and the GMCH cannot filter that
>> interrupt souce.) As we enable our IRQ early so that we can use it
>> during hardware probing, our interrupt handler must be prepared to
>> handle a few sources prior to being fully configured. As such, we need
>> to add a simple is-ready check prior to dereferencing our KMS state for
>> reporting underruns.
>>
>> Reported-by: Rob Clark <rclark@redhat.com>
>> Bugzilla: https://bugzilla.redhat.com/show_bug.cgi?id=1193972
>
> "You are not authorized to access bug #1193972. To see this bug, you
> must first log in to an account with the appropriate permissions."
>
> Meh.
Pushed to drm-intel-fixes, thanks for the patch and review. If someone
both cares and has access to the bugzilla, please update it.
BR,
Jani.
>
>> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
>> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
>> Cc: stable@vger.kernel.org
>> ---
>> drivers/gpu/drm/i915/intel_fifo_underrun.c | 18 +++++++-----------
>> 1 file changed, 7 insertions(+), 11 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/intel_fifo_underrun.c b/drivers/gpu/drm/i915/intel_fifo_underrun.c
>> index 04e248dd2259..f2fd992e3cd8 100644
>> --- a/drivers/gpu/drm/i915/intel_fifo_underrun.c
>> +++ b/drivers/gpu/drm/i915/intel_fifo_underrun.c
>> @@ -282,16 +282,6 @@ bool intel_set_cpu_fifo_underrun_reporting(struct drm_i915_private *dev_priv,
>> return ret;
>> }
>>
>> -static bool
>> -__cpu_fifo_underrun_reporting_enabled(struct drm_i915_private *dev_priv,
>> - enum pipe pipe)
>> -{
>> - struct drm_crtc *crtc = dev_priv->pipe_to_crtc_mapping[pipe];
>> - struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
>> -
>> - return !intel_crtc->cpu_fifo_underrun_disabled;
>> -}
>> -
>> /**
>> * intel_set_pch_fifo_underrun_reporting - set PCH fifo underrun reporting state
>> * @dev_priv: i915 device instance
>> @@ -352,9 +342,15 @@ bool intel_set_pch_fifo_underrun_reporting(struct drm_i915_private *dev_priv,
>> void intel_cpu_fifo_underrun_irq_handler(struct drm_i915_private *dev_priv,
>> enum pipe pipe)
>> {
>> + struct drm_crtc *crtc = dev_priv->pipe_to_crtc_mapping[pipe];
>> +
>> + /* We may be called too early in init, thanks BIOS! */
>> + if (crtc == NULL)
>> + return;
>> +
>> /* GMCH can't disable fifo underruns, filter them. */
>> if (HAS_GMCH_DISPLAY(dev_priv->dev) &&
>> - !__cpu_fifo_underrun_reporting_enabled(dev_priv, pipe))
>> + !to_intel_crtc(crtc)->cpu_fifo_underrun_disabled)
>> return;
>>
>> if (intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, false))
>> --
>> 2.1.4
>>
>> _______________________________________________
>> Intel-gfx mailing list
>> Intel-gfx@lists.freedesktop.org
>> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
> --
> Jani Nikula, Intel Open Source Technology Center
--
Jani Nikula, Intel Open Source Technology Center
^ permalink raw reply [flat|nested] 7+ messages in thread* Re: [Intel-gfx] [PATCH] drm/i915: Check for driver readyness before handling an underrun interrupt
2015-02-27 8:20 ` Jani Nikula
@ 2015-02-27 9:27 ` Chris Wilson
2015-02-27 9:53 ` Jani Nikula
2015-02-27 14:24 ` Daniel Vetter
0 siblings, 2 replies; 7+ messages in thread
From: Chris Wilson @ 2015-02-27 9:27 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-gfx, daniel.vetter, rclark, stable
On Fri, Feb 27, 2015 at 10:20:05AM +0200, Jani Nikula wrote:
> On Fri, 27 Feb 2015, Jani Nikula <jani.nikula@linux.intel.com> wrote:
> > On Thu, 26 Feb 2015, Chris Wilson <chris@chris-wilson.co.uk> wrote:
> >> When we takeover from the BIOS and install our interrupt handler, the
> >> BIOS may have left us a few surprises in the form of spontaneous
> >> interrupts. (This is especially likely on hardware like 965gm where
> >> display fifo underruns are continuous and the GMCH cannot filter that
> >> interrupt souce.) As we enable our IRQ early so that we can use it
> >> during hardware probing, our interrupt handler must be prepared to
> >> handle a few sources prior to being fully configured. As such, we need
> >> to add a simple is-ready check prior to dereferencing our KMS state for
> >> reporting underruns.
> >>
> >> Reported-by: Rob Clark <rclark@redhat.com>
> >> Bugzilla: https://bugzilla.redhat.com/show_bug.cgi?id=1193972
> >
> > "You are not authorized to access bug #1193972. To see this bug, you
> > must first log in to an account with the appropriate permissions."
> >
> > Meh.
>
> Pushed to drm-intel-fixes, thanks for the patch and review. If someone
> both cares and has access to the bugzilla, please update it.
Jani, I goofed...
> >> /* GMCH can't disable fifo underruns, filter them. */
> >> if (HAS_GMCH_DISPLAY(dev_priv->dev) &&
> >> - !__cpu_fifo_underrun_reporting_enabled(dev_priv, pipe))
> >> + !to_intel_crtc(crtc)->cpu_fifo_underrun_disabled)
Should be without the '!':
if (HAS_GMCH_DISPLAY(dev_priv->dev) &&
to_intel_crtc(crtc)->cpu_fifo_underrun_disabled)
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
^ permalink raw reply [flat|nested] 7+ messages in thread* Re: [PATCH] drm/i915: Check for driver readyness before handling an underrun interrupt
2015-02-27 9:27 ` Chris Wilson
@ 2015-02-27 9:53 ` Jani Nikula
2015-02-27 14:24 ` Daniel Vetter
1 sibling, 0 replies; 7+ messages in thread
From: Jani Nikula @ 2015-02-27 9:53 UTC (permalink / raw)
To: Chris Wilson; +Cc: daniel.vetter, intel-gfx, rclark, stable
On Fri, 27 Feb 2015, Chris Wilson <chris@chris-wilson.co.uk> wrote:
> On Fri, Feb 27, 2015 at 10:20:05AM +0200, Jani Nikula wrote:
>> On Fri, 27 Feb 2015, Jani Nikula <jani.nikula@linux.intel.com> wrote:
>> > On Thu, 26 Feb 2015, Chris Wilson <chris@chris-wilson.co.uk> wrote:
>> >> When we takeover from the BIOS and install our interrupt handler, the
>> >> BIOS may have left us a few surprises in the form of spontaneous
>> >> interrupts. (This is especially likely on hardware like 965gm where
>> >> display fifo underruns are continuous and the GMCH cannot filter that
>> >> interrupt souce.) As we enable our IRQ early so that we can use it
>> >> during hardware probing, our interrupt handler must be prepared to
>> >> handle a few sources prior to being fully configured. As such, we need
>> >> to add a simple is-ready check prior to dereferencing our KMS state for
>> >> reporting underruns.
>> >>
>> >> Reported-by: Rob Clark <rclark@redhat.com>
>> >> Bugzilla: https://bugzilla.redhat.com/show_bug.cgi?id=1193972
>> >
>> > "You are not authorized to access bug #1193972. To see this bug, you
>> > must first log in to an account with the appropriate permissions."
>> >
>> > Meh.
>>
>> Pushed to drm-intel-fixes, thanks for the patch and review. If someone
>> both cares and has access to the bugzilla, please update it.
>
> Jani, I goofed...
>
>> >> /* GMCH can't disable fifo underruns, filter them. */
>> >> if (HAS_GMCH_DISPLAY(dev_priv->dev) &&
>> >> - !__cpu_fifo_underrun_reporting_enabled(dev_priv, pipe))
>> >> + !to_intel_crtc(crtc)->cpu_fifo_underrun_disabled)
>
> Should be without the '!':
> if (HAS_GMCH_DISPLAY(dev_priv->dev) &&
> to_intel_crtc(crtc)->cpu_fifo_underrun_disabled)
It never happened.
BR,
Jani.
> -Chris
>
> --
> Chris Wilson, Intel Open Source Technology Centre
--
Jani Nikula, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] drm/i915: Check for driver readyness before handling an underrun interrupt
2015-02-27 9:27 ` Chris Wilson
2015-02-27 9:53 ` Jani Nikula
@ 2015-02-27 14:24 ` Daniel Vetter
1 sibling, 0 replies; 7+ messages in thread
From: Daniel Vetter @ 2015-02-27 14:24 UTC (permalink / raw)
To: Chris Wilson, Jani Nikula, intel-gfx, daniel.vetter, rclark,
stable
On Fri, Feb 27, 2015 at 09:27:04AM +0000, Chris Wilson wrote:
> On Fri, Feb 27, 2015 at 10:20:05AM +0200, Jani Nikula wrote:
> > On Fri, 27 Feb 2015, Jani Nikula <jani.nikula@linux.intel.com> wrote:
> > > On Thu, 26 Feb 2015, Chris Wilson <chris@chris-wilson.co.uk> wrote:
> > >> When we takeover from the BIOS and install our interrupt handler, the
> > >> BIOS may have left us a few surprises in the form of spontaneous
> > >> interrupts. (This is especially likely on hardware like 965gm where
> > >> display fifo underruns are continuous and the GMCH cannot filter that
> > >> interrupt souce.) As we enable our IRQ early so that we can use it
> > >> during hardware probing, our interrupt handler must be prepared to
> > >> handle a few sources prior to being fully configured. As such, we need
> > >> to add a simple is-ready check prior to dereferencing our KMS state for
> > >> reporting underruns.
> > >>
> > >> Reported-by: Rob Clark <rclark@redhat.com>
> > >> Bugzilla: https://bugzilla.redhat.com/show_bug.cgi?id=1193972
> > >
> > > "You are not authorized to access bug #1193972. To see this bug, you
> > > must first log in to an account with the appropriate permissions."
> > >
> > > Meh.
> >
> > Pushed to drm-intel-fixes, thanks for the patch and review. If someone
> > both cares and has access to the bugzilla, please update it.
>
> Jani, I goofed...
>
> > >> /* GMCH can't disable fifo underruns, filter them. */
> > >> if (HAS_GMCH_DISPLAY(dev_priv->dev) &&
> > >> - !__cpu_fifo_underrun_reporting_enabled(dev_priv, pipe))
> > >> + !to_intel_crtc(crtc)->cpu_fifo_underrun_disabled)
>
> Should be without the '!':
> if (HAS_GMCH_DISPLAY(dev_priv->dev) &&
> to_intel_crtc(crtc)->cpu_fifo_underrun_disabled)
Somewhere on my todo is to invert the sense of our underrun reporting.
I've screwed this up countless times, but I fear the patch to switch will
be buggy as well ;-)
/me is chicken
Cheers, Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] drm/i915: Check for driver readyness before handling an underrun interrupt
2015-02-26 15:53 [PATCH] drm/i915: Check for driver readyness before handling an underrun interrupt Chris Wilson
2015-02-27 7:52 ` [Intel-gfx] " Jani Nikula
@ 2015-02-28 19:16 ` shuang.he
1 sibling, 0 replies; 7+ messages in thread
From: shuang.he @ 2015-02-28 19:16 UTC (permalink / raw)
To: shuang.he, ethan.gao, intel-gfx, chris
Tested-By: PRC QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
Task id: 5842
-------------------------------------Summary-------------------------------------
Platform Delta drm-intel-nightly Series Applied
PNV 282/282 282/282
ILK -1 308/308 307/308
SNB -1 326/326 325/326
IVB 379/379 379/379
BYT 294/294 294/294
HSW 387/387 387/387
BDW -1 316/316 315/316
-------------------------------------Detailed-------------------------------------
Platform Test drm-intel-nightly Series Applied
*ILK igt_kms_flip_rcs-wf_vblank-vs-dpms-interruptible PASS(4) DMESG_WARN(1)PASS(1)
*SNB igt_kms_plane_plane-panning-bottom-right-pipe-B-plane-1 PASS(3) TIMEOUT(1)PASS(1)
*BDW igt_gem_gtt_hog PASS(15) DMESG_WARN(1)PASS(1)
Note: You need to pay more attention to line start with '*'
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2015-02-28 19:16 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz follow: Atom feed
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2015-02-26 15:53 [PATCH] drm/i915: Check for driver readyness before handling an underrun interrupt Chris Wilson
2015-02-27 7:52 ` [Intel-gfx] " Jani Nikula
2015-02-27 8:20 ` Jani Nikula
2015-02-27 9:27 ` Chris Wilson
2015-02-27 9:53 ` Jani Nikula
2015-02-27 14:24 ` Daniel Vetter
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