From: Thomas Gleixner <tglx@kernel.org>
To: Peter Zijlstra <peterz@infradead.org>,
Sean Christopherson <seanjc@google.com>
Cc: Jim Mattson <jmattson@google.com>,
Binbin Wu <binbin.wu@linux.intel.com>,
Vishal L Verma <vishal.l.verma@intel.com>,
"kvm@vger.kernel.org" <kvm@vger.kernel.org>,
Rick P Edgecombe <rick.p.edgecombe@intel.com>,
Binbin Wu <binbin.wu@intel.com>,
"x86@kernel.org" <x86@kernel.org>,
Paolo Bonzini <bonzini@redhat.com>
Subject: Re: CPU Lockups in KVM with deferred hrtimer rearming
Date: Thu, 23 Apr 2026 00:57:49 +0200 [thread overview]
Message-ID: <87o6ja1u36.ffs@tglx> (raw)
In-Reply-To: <20260422074646.GO3126523@noisy.programming.kicks-ass.net>
On Wed, Apr 22 2026 at 09:46, Peter Zijlstra wrote:
> On Wed, Apr 22, 2026 at 08:55:42AM +0200, Peter Zijlstra wrote:
>> On Tue, Apr 21, 2026 at 02:42:46PM -0700, Sean Christopherson wrote:
>> > On Tue, Apr 21, 2026, Peter Zijlstra wrote:
>> > > On Tue, Apr 21, 2026 at 08:57:24PM +0000, Sean Christopherson wrote:
>> > > > This as delta? (I had typed this all up before Peter posted a new verison, so
>> > > > dammit I'm sending it!)
>> > >
>> > > :-)
>> > >
>> > > I'll go stare at it in the morning, I'm about to go crash out.
>> >
>> > New delta against your effective v2, builds all of my configs (which isn't _that_
>> > many, but I think they cover most of the weirder ways to include KVM (or not)).
>> >
>> > I'll start testing the full thing to try and get early signal on the health.
>>
>> Oh, re-reading commit 28d11e4548b7, I think this wrecks NMIs. The patch
>> will also use the FRED NMI path and that's not good when running IDT.
>>
>> I'll go fix that and stick in a few more comments to clarify this magic.
>
> This should probably we at least two patches, one moving the code into
> the x86 core and one adding that hrtimer fix on top. But kept as one for
> now.
>
> Irrespective of the hrtimer fix, I think the initial move into x86 core
> part is a sane move.
I agree.
> +#if IS_ENABLED(CONFIG_KVM_INTEL)
> +/*
> + * On VMX, NMIs and IRQs (as configured by KVM) are acknowledge by hardware as
> + * part of the VM-Exit, i.e. the event itself is consumed as part the VM-Exit.
> + * x86_entry_from_kvm() is invoked by KVM to effectively forward NMIs and IRQs
> + * to the kernel for servicing. On SVM, a.k.a. AMD, the NMI/IRQ VM-Exit is
> + * purely a signal that an NMI/IRQ is pending, i.e. the event that triggered
> + * the VM-Exit is held pending until it's unblocked in the host.
> + */
> +noinstr void x86_entry_from_kvm(unsigned int event_type, unsigned int vector)
> +{
> + if (event_type == EVENT_TYPE_EXTINT) {
> +#ifdef CONFIG_X86_64
> + /*
> + * Use FRED dispatch, even when running IDT. The dispatch
> + * tables are kept in sync between FRED and IDT, and the FRED
> + * dispatch works well with CFI.
> + */
> + fred_entry_from_kvm(event_type, vector);
> +#else
> + idt_entry_from_kvm(vector);
> +#endif
> + /*
> + * Strictly speaking, only the NMI path requires noinstr.
> + */
> + instrumentation_begin();
> + /*
> + * KVM/VMX will dispatch from IRQ-disabled but for a context
> + * that will have IRQs-enabled. This confuses the entry code
> + * and it will not have reprogrammed the timer (or do
> + * preemption). Minimal fixup for now.
It's sadly the final fixup.
There is no way that KVM can benefit from the deferred rearm mechanism
in case that NEED_RESCHED is set.
That's actually independent of the VMX specific handle_exit_irqoff()
situation, which obviously cannot reschedule.
The other early local_irq_enable/disable dance, which caused you to buy
a new WTF'o'meter, happens with preemption disabled, so the irq exit
code will do the rearm right there.
So be it ....
Thanks,
tglx
next prev parent reply other threads:[~2026-04-22 22:57 UTC|newest]
Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-16 20:50 CPU Lockups in KVM with deferred hrtimer rearming Verma, Vishal L
2026-04-20 15:00 ` Thomas Gleixner
2026-04-20 15:22 ` Thomas Gleixner
2026-04-20 20:57 ` Verma, Vishal L
2026-04-20 22:19 ` Thomas Gleixner
2026-04-20 22:24 ` Verma, Vishal L
2026-04-21 6:29 ` Thomas Gleixner
2026-04-21 4:51 ` Binbin Wu
2026-04-21 7:39 ` Thomas Gleixner
2026-04-21 11:18 ` Peter Zijlstra
2026-04-21 11:32 ` Peter Zijlstra
2026-04-21 11:34 ` Peter Zijlstra
2026-04-21 11:49 ` Peter Zijlstra
2026-04-21 12:05 ` Peter Zijlstra
2026-04-21 13:19 ` Peter Zijlstra
2026-04-21 13:29 ` Peter Zijlstra
2026-04-21 16:36 ` Thomas Gleixner
2026-04-21 18:11 ` Verma, Vishal L
2026-04-21 17:11 ` Thomas Gleixner
2026-04-21 17:20 ` Jim Mattson
2026-04-21 18:29 ` Thomas Gleixner
2026-04-21 18:55 ` Sean Christopherson
2026-04-21 20:06 ` Peter Zijlstra
2026-04-21 20:46 ` Peter Zijlstra
2026-04-21 20:57 ` Sean Christopherson
2026-04-21 21:02 ` Peter Zijlstra
2026-04-21 21:42 ` Sean Christopherson
2026-04-22 6:55 ` Peter Zijlstra
2026-04-22 7:46 ` Peter Zijlstra
2026-04-22 14:08 ` Peter Zijlstra
2026-04-22 15:26 ` Sean Christopherson
2026-04-22 19:13 ` Verma, Vishal L
2026-04-22 22:57 ` Thomas Gleixner [this message]
2026-04-23 15:23 ` Peter Zijlstra
2026-04-22 13:47 ` Sean Christopherson
2026-04-21 20:39 ` Paolo Bonzini
2026-04-21 21:02 ` Sean Christopherson
2026-04-21 22:48 ` Thomas Gleixner
2026-04-21 23:15 ` Paolo Bonzini
2026-04-21 23:34 ` Jim Mattson
2026-04-21 23:37 ` Paolo Bonzini
2026-04-22 2:10 ` Thomas Gleixner
2026-04-21 21:49 ` Thomas Gleixner
2026-04-21 22:07 ` Sean Christopherson
2026-04-21 22:24 ` Paolo Bonzini
2026-04-21 19:18 ` Verma, Vishal L
2026-04-21 16:30 ` Thomas Gleixner
2026-04-21 16:11 ` Verma, Vishal L
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