Re: [PULL 09/17] hw/display: re-arrange memory region tracking

["Alex Bennée" <alex.bennee@linaro.org>]

Akihiko Odaki <odaki@rsg.ci.i.u-tokyo.ac.jp> writes:

> On 2025/06/06 18:54, Alex Bennée wrote:
>> Akihiko Odaki <odaki@rsg.ci.i.u-tokyo.ac.jp> writes:
>> 
>>> On 2025/06/06 1:26, Alex Bennée wrote:
>>>> QOM objects can be embedded in other QOM objects and managed as part
>>>> of their lifetime but this isn't the case for
>>>> virtio_gpu_virgl_hostmem_region. However before we can split it out we
>>>> need some other way of associating the wider data structure with the
>>>> memory region.
>>>> Fortunately MemoryRegion has an opaque pointer. This is passed down
>>>> to
>>>> MemoryRegionOps for device type regions but is unused in the
>>>> memory_region_init_ram_ptr() case. Use the opaque to carry the
>>>> reference and allow the final MemoryRegion object to be reaped when
>>>> its reference count is cleared.
>>>> Signed-off-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org>
>>>> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
>>>> Message-Id: <20250410122643.1747913-2-manos.pitsidianakis@linaro.org>
>>>> Cc: qemu-stable@nongnu.org
>>>> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
>>>> Message-ID: <20250603110204.838117-10-alex.bennee@linaro.org>
>>>
>>> I have told you that you should address all comments before sending a
>>> series again a few times[1][2], but you haven't done that.
>> I've given reasons. Thanks for your review but you don't get to
>> veto.
>> 
>>> I pointed out it has no effect (fixing or improving something) other
>>> than adding a memory allocation, but you didn't make a reply to prove
>>> otherwise.
>> I explained the commit cover what it is doing.
>
> It still doesn't explain the motivation.
>
<snip>

It fixes the anti-pattern of embedding a QOM object into a non-QOM
container. It enables in the following patches the lifetime of the MR to
be covered controlled purely by its references and not be so tangled up
with virglrenderers internals.

-- 
Alex Bennée
Virtualisation Tech Lead @ Linaro