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From: Thomas Gleixner <tglx@linutronix.de>
To: Stanimir Varbanov <svarbanov@suse.de>,
	linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-rpi-kernel@lists.infradead.org, linux-pci@vger.kernel.org,
	Broadcom internal kernel review list
	<bcm-kernel-feedback-list@broadcom.com>
Cc: Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Florian Fainelli <florian.fainelli@broadcom.com>,
	Jim Quinlan <jim2101024@gmail.com>,
	Nicolas Saenz Julienne <nsaenz@kernel.org>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Lorenzo Pieralisi <lpieralisi@kernel.org>,
	kw@linux.com, Philipp Zabel <p.zabel@pengutronix.de>,
	Andrea della Porta <andrea.porta@suse.com>,
	Phil Elwell <phil@raspberrypi.com>,
	Jonathan Bell <jonathan@raspberrypi.com>,
	Stanimir Varbanov <svarbanov@suse.de>
Subject: Re: [PATCH v3 03/11] irqchip: mip: Add Broadcom bcm2712 MSI-X interrupt controller
Date: Mon, 14 Oct 2024 18:31:32 +0200	[thread overview]
Message-ID: <87o73mfxy3.ffs@tglx> (raw)
In-Reply-To: <20241014130710.413-4-svarbanov@suse.de>


> Subject: irqchip: mip:

is not a valid prefix

Just make it: irqchip: Add Broadcom  .....

> +static int mip_middle_domain_alloc(struct irq_domain *domain, unsigned int virq,
> +				   unsigned int nr_irqs, void *arg)
> +{
> +	struct mip_priv *mip = domain->host_data;
> +	struct irq_fwspec fwspec = {0};
> +	struct irq_data *irqd;
> +	unsigned int hwirq, irq, i;

	unsigned int hwirq, irq, i;
	struct irq_data *irqd;

> +
> +#define MIP_MSI_FLAGS_REQUIRED	(MSI_FLAG_USE_DEF_DOM_OPS |	\
> +				 MSI_FLAG_USE_DEF_CHIP_OPS |	\
> +				 MSI_FLAG_PCI_MSI_MASK_PARENT |	\
> +				 MSI_FLAG_PCI_MSIX)

Why are you requiring MSI_FLAG_PCI_MSIX here? That's a supported flag,
not a required one.

> +#define MIP_MSI_FLAGS_SUPPORTED	(MSI_GENERIC_FLAGS_MASK |	\
> +				 MSI_FLAG_PCI_MSIX |		\

So this does not support multi MSI, but your allocation function looks
like it supports it (nr_irqs is not range checked).

> +				 IRQ_DOMAIN_FLAG_MSI_PARENT)

This is not a MSI flag and has no place here.

> +static const struct msi_parent_ops mip_msi_parent_ops = {
> +	.supported_flags	= MIP_MSI_FLAGS_SUPPORTED,
> +	.required_flags		= MIP_MSI_FLAGS_REQUIRED,
> +	.bus_select_token       = DOMAIN_BUS_PCI_MSI,
> +	.bus_select_mask	= MATCH_PCI_MSI,
> +	.prefix			= "MIP-MSI-",
> +	.init_dev_msi_info	= msi_lib_init_dev_msi_info,
> +};
> +
> +static int mip_init_domains(struct mip_priv *mip, struct device_node *np)
> +{
> +	struct irq_domain *middle;
> +
> +	middle = irq_domain_add_hierarchy(mip->parent, 0, mip->num_msis, np,
> +					  &mip_middle_domain_ops, mip);
> +	if (!middle)
> +		return -ENOMEM;
> +
> +	irq_domain_update_bus_token(middle, DOMAIN_BUS_PCI_MSI);

That's the wrong token. DOMAIN_BUS_PCI_MSI is what the v2 global PCI/MSI
domain uses. But that's not what this is about. This is the parent
domain for PCI/MSI. DOMAIN_BUS_GENERIC_MSI or DOMAIN_BUS_NEXUS is what
you want here.

> +	middle->dev = mip->dev;
> +	middle->flags |= IRQ_DOMAIN_FLAG_MSI_PARENT;
> +	middle->msi_parent_ops = &mip_msi_parent_ops;
> +

Other than this, this looks good now.

Thanks,

        tglx

  reply	other threads:[~2024-10-14 16:31 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-10-14 13:06 [PATCH v3 00/11] Add PCIe support for bcm2712 Stanimir Varbanov
2024-10-14 13:07 ` [PATCH v3 01/11] dt-bindings: interrupt-controller: Add bcm2712 MSI-X DT bindings Stanimir Varbanov
2024-10-15 20:11   ` Rob Herring (Arm)
2024-10-14 13:07 ` [PATCH v3 02/11] dt-bindings: PCI: brcmstb: Update bindings for PCIe on bcm2712 Stanimir Varbanov
2024-10-14 13:07 ` [PATCH v3 03/11] irqchip: mip: Add Broadcom bcm2712 MSI-X interrupt controller Stanimir Varbanov
2024-10-14 16:31   ` Thomas Gleixner [this message]
2024-10-14 13:07 ` [PATCH v3 04/11] PCI: brcmstb: Expand inbound size calculation helper Stanimir Varbanov
2024-10-14 16:57   ` Bjorn Helgaas
2024-10-14 17:10     ` Florian Fainelli
2024-10-14 17:25       ` Bjorn Helgaas
2024-10-16 17:09         ` Jim Quinlan
2024-10-16 19:38           ` Bjorn Helgaas
2024-10-17  8:02             ` Stanimir Varbanov
2024-10-18 23:31               ` Bjorn Helgaas
2024-10-14 13:07 ` [PATCH v3 05/11] PCI: brcmstb: Enable external MSI-X if available Stanimir Varbanov
2024-10-14 13:07 ` [PATCH v3 06/11] PCI: brcmstb: Avoid turn off of bridge reset Stanimir Varbanov
2024-10-14 17:01   ` Bjorn Helgaas
2024-10-14 17:02     ` Florian Fainelli
2024-10-17  8:07       ` Stanimir Varbanov
2024-10-16 17:17   ` Jim Quinlan
2024-10-17  8:05     ` Stanimir Varbanov
2024-10-14 13:07 ` [PATCH v3 07/11] PCI: brcmstb: Add bcm2712 support Stanimir Varbanov
2024-10-14 13:07 ` [PATCH v3 08/11] PCI: brcmstb: Reuse config structure Stanimir Varbanov
2024-10-14 17:03   ` Bjorn Helgaas
2024-10-17  8:09     ` Stanimir Varbanov
2024-10-14 13:07 ` [PATCH v3 09/11] PCI: brcmstb: Adjust PHY PLL setup to use a 54MHz input refclk Stanimir Varbanov
2024-10-14 17:07   ` Florian Fainelli
2024-10-17 14:42     ` Stanimir Varbanov
2024-10-21 12:56       ` Jonathan Bell
2024-10-21 15:39         ` Stanimir Varbanov
2024-10-14 13:07 ` [PATCH v3 10/11] arm64: dts: broadcom: bcm2712: Add PCIe DT nodes Stanimir Varbanov
2024-10-14 13:07 ` [PATCH v3 11/11] arm64: dts: broadcom: bcm2712-rpi-5-b: Enable " Stanimir Varbanov
2024-10-14 14:05 ` [PATCH v3 00/11] Add PCIe support for bcm2712 Rob Herring (Arm)
2024-10-14 15:41   ` Stanimir Varbanov

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