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From: Jani Nikula <jani.nikula@linux.intel.com>
To: Ankit Nautiyal <ankit.k.nautiyal@intel.com>,
	dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 2/2] drivers/drm/i915: Honor limits->max_bpp while computing DSC max input bpp
Date: Thu, 24 Aug 2023 12:44:00 +0300	[thread overview]
Message-ID: <87o7iw4vxb.fsf@intel.com> (raw)
In-Reply-To: <20230823115425.715644-3-ankit.k.nautiyal@intel.com>

On Wed, 23 Aug 2023, Ankit Nautiyal <ankit.k.nautiyal@intel.com> wrote:
> Edid specific BPC constraints are stored in limits->max_bpp. Honor these
> limits while computing the input bpp for DSC.
>
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_dp.c | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 5b48bfe09d0e..2a7f6cfe2832 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -2061,9 +2061,11 @@ static int intel_edp_dsc_compute_pipe_bpp(struct intel_dp *intel_dp,
>  	if (forced_bpp) {
>  		pipe_bpp = forced_bpp;
>  	} else {
> +		u8 max_bpc = limits->max_bpp / 3;
> +

		int max_bpc = min_t(int, limits->max_bpp / 3, conn_state->max_requested_bpc);

>  		/* For eDP use max bpp that can be supported with DSC. */
>  		pipe_bpp = intel_dp_dsc_compute_max_bpp(intel_dp, max_bbc);

Nitpick, IMO looks cleaner this way, as well as uses int instead of u8
for computations.

BR,
Jani.

>  		if (!is_dsc_pipe_bpp_sufficient(i915, conn_state, limits, pipe_bpp)) {
>  			drm_dbg_kms(&i915->drm,
>  				    "Computed BPC is not in DSC BPC limits\n");

-- 
Jani Nikula, Intel Open Source Graphics Center

  parent reply	other threads:[~2023-08-24  9:44 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-08-23 11:54 [Intel-gfx] [PATCH 0/2] eDP DSC fixes Ankit Nautiyal
2023-08-23 11:54 ` Ankit Nautiyal
2023-08-23 11:54 ` [Intel-gfx] [PATCH 1/2] drm/display/dp: Default 8 bpc support when DSC is supported Ankit Nautiyal
2023-08-23 11:54   ` Ankit Nautiyal
2023-08-23 16:26   ` [Intel-gfx] " kernel test robot
2023-08-23 16:26     ` kernel test robot
2023-08-24  3:47   ` [Intel-gfx] " Ankit Nautiyal
2023-08-24  3:47     ` Ankit Nautiyal
2023-08-24  9:45     ` [Intel-gfx] " Jani Nikula
2023-08-24  9:45       ` Jani Nikula
2023-08-24 11:41       ` [Intel-gfx] " Nautiyal, Ankit K
2023-08-24 11:41         ` Nautiyal, Ankit K
2023-08-23 11:54 ` [Intel-gfx] [PATCH 2/2] drivers/drm/i915: Honor limits->max_bpp while computing DSC max input bpp Ankit Nautiyal
2023-08-23 11:54   ` Ankit Nautiyal
2023-08-24  9:29   ` [Intel-gfx] " Lisovskiy, Stanislav
2023-08-24 11:34     ` Nautiyal, Ankit K
2023-08-24  9:44   ` Jani Nikula [this message]
2023-08-24 11:37     ` Nautiyal, Ankit K
2023-08-23 13:02 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for eDP DSC fixes Patchwork
2023-08-23 13:02 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-08-23 13:20 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2023-08-24  4:31 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for eDP DSC fixes (rev2) Patchwork
2023-08-24  4:31 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-08-24  4:48 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-08-24 11:35 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
  -- strict thread matches above, loose matches on Subject: below --
2023-08-24 12:51 [Intel-gfx] [PATCH 0/2] eDP DSC fixes Ankit Nautiyal
2023-08-24 12:51 ` [Intel-gfx] [PATCH 2/2] drivers/drm/i915: Honor limits->max_bpp while computing DSC max input bpp Ankit Nautiyal
2023-08-30 12:02   ` Jani Nikula

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