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From: "Alex Bennée" <alex.bennee@linaro.org>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: qemu-devel@nongnu.org, qemu-arm@nongnu.org
Subject: Re: [RFC PATCH] gdb/gic: expose cpu_index via MxTxAttrs
Date: Tue, 12 Apr 2022 12:19:56 +0100	[thread overview]
Message-ID: <87o816zgxc.fsf@linaro.org> (raw)
In-Reply-To: <CAFEAcA_j78LD=K=BY+szHK+X0kyh3RXm7ZT4gM2GDmcKTLYeCA@mail.gmail.com>


Peter Maydell <peter.maydell@linaro.org> writes:

> On Tue, 12 Apr 2022 at 11:45, Alex Bennée <alex.bennee@linaro.org> wrote:
>>
>> When accessing HW via the gdbstub we can't easily figure out what the
>> cpu_index is. The canonical case is current_cpu but for some cases
>> that will be NULL. For debug accesses we can overload requester_id and
>> make the GIC a bit smarter about fishing that out.
>>
>> [AJB: very much a PoC hack for now but interested if this makes sense.
>> We could encode cpu_index in another field but that would grow
>> MxTxAttrs even more.]
>>
>> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
>> Resolves: https://gitlab.com/qemu-project/qemu/-/issues/124
>> ---
>>  include/exec/memattrs.h |  2 +-
>>  hw/core/cpu-sysemu.c    | 15 +++++++++++----
>>  hw/intc/arm_gic.c       | 33 +++++++++++++++++++--------------
>>  3 files changed, 31 insertions(+), 19 deletions(-)
>>
>> diff --git a/include/exec/memattrs.h b/include/exec/memattrs.h
>> index 9fb98bc1ef..1333a34cb3 100644
>> --- a/include/exec/memattrs.h
>> +++ b/include/exec/memattrs.h
>> @@ -43,7 +43,7 @@ typedef struct MemTxAttrs {
>>       * (see MEMTX_ACCESS_ERROR).
>>       */
>>      unsigned int memory:1;
>> -    /* Requester ID (for MSI for example) */
>> +    /* Requester ID (for MSI for example) or cpu_index for debug */
>>      unsigned int requester_id:16;
>
> If we want to provide a requester ID for memory transactions we
> should provide it always, not just for debug. That way gic_get_current_cpu()
> and similar code can unconditionally use requester_id and never needs
> to look at current_cpu. (We would also need to figure out how we want
> to parcel out requester_ids in the system, so that PCI requester IDs
> don't clash with CPU requester IDs.)

We could have a requester_type field (0 for CPU, 1 for PCI for now)?

>
> -- PMM


-- 
Alex Bennée

WARNING: multiple messages have this Message-ID (diff)
From: "Alex Bennée" <alex.bennee@linaro.org>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: qemu-arm@nongnu.org, qemu-devel@nongnu.org
Subject: Re: [RFC PATCH] gdb/gic: expose cpu_index via MxTxAttrs
Date: Tue, 12 Apr 2022 12:19:56 +0100	[thread overview]
Message-ID: <87o816zgxc.fsf@linaro.org> (raw)
In-Reply-To: <CAFEAcA_j78LD=K=BY+szHK+X0kyh3RXm7ZT4gM2GDmcKTLYeCA@mail.gmail.com>


Peter Maydell <peter.maydell@linaro.org> writes:

> On Tue, 12 Apr 2022 at 11:45, Alex Bennée <alex.bennee@linaro.org> wrote:
>>
>> When accessing HW via the gdbstub we can't easily figure out what the
>> cpu_index is. The canonical case is current_cpu but for some cases
>> that will be NULL. For debug accesses we can overload requester_id and
>> make the GIC a bit smarter about fishing that out.
>>
>> [AJB: very much a PoC hack for now but interested if this makes sense.
>> We could encode cpu_index in another field but that would grow
>> MxTxAttrs even more.]
>>
>> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
>> Resolves: https://gitlab.com/qemu-project/qemu/-/issues/124
>> ---
>>  include/exec/memattrs.h |  2 +-
>>  hw/core/cpu-sysemu.c    | 15 +++++++++++----
>>  hw/intc/arm_gic.c       | 33 +++++++++++++++++++--------------
>>  3 files changed, 31 insertions(+), 19 deletions(-)
>>
>> diff --git a/include/exec/memattrs.h b/include/exec/memattrs.h
>> index 9fb98bc1ef..1333a34cb3 100644
>> --- a/include/exec/memattrs.h
>> +++ b/include/exec/memattrs.h
>> @@ -43,7 +43,7 @@ typedef struct MemTxAttrs {
>>       * (see MEMTX_ACCESS_ERROR).
>>       */
>>      unsigned int memory:1;
>> -    /* Requester ID (for MSI for example) */
>> +    /* Requester ID (for MSI for example) or cpu_index for debug */
>>      unsigned int requester_id:16;
>
> If we want to provide a requester ID for memory transactions we
> should provide it always, not just for debug. That way gic_get_current_cpu()
> and similar code can unconditionally use requester_id and never needs
> to look at current_cpu. (We would also need to figure out how we want
> to parcel out requester_ids in the system, so that PCI requester IDs
> don't clash with CPU requester IDs.)

We could have a requester_type field (0 for CPU, 1 for PCI for now)?

>
> -- PMM


-- 
Alex Bennée


  reply	other threads:[~2022-04-12 11:20 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-04-12 10:45 [RFC PATCH] gdb/gic: expose cpu_index via MxTxAttrs Alex Bennée
2022-04-12 10:45 ` Alex Bennée
2022-04-12 11:03 ` Peter Maydell
2022-04-12 11:03   ` Peter Maydell
2022-04-12 11:19   ` Alex Bennée [this message]
2022-04-12 11:19     ` Alex Bennée

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