From: Jani Nikula <jani.nikula@intel.com>
To: Matt Roper <matthew.d.roper@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH] drm/i915/snps: constify struct intel_mpllb_state arrays harder
Date: Thu, 26 Aug 2021 12:27:51 +0300 [thread overview]
Message-ID: <87o89kd088.fsf@intel.com> (raw)
In-Reply-To: <20210825170955.GV461228@mdroper-desk1.amr.corp.intel.com>
On Wed, 25 Aug 2021, Matt Roper <matthew.d.roper@intel.com> wrote:
> On Wed, Aug 25, 2021 at 05:58:11PM +0300, Jani Nikula wrote:
>> The tables should be const arrays of const pointers, not just arrays of
>> const pointers.
>>
>> Cc: Matt Roper <matthew.d.roper@intel.com>
>> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
>
> Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Thanks, pushed.
BR,
Jani.
>
>> ---
>> drivers/gpu/drm/i915/display/intel_snps_phy.c | 14 +++++++-------
>> 1 file changed, 7 insertions(+), 7 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_snps_phy.c b/drivers/gpu/drm/i915/display/intel_snps_phy.c
>> index d81f71296297..58ec2467ad66 100644
>> --- a/drivers/gpu/drm/i915/display/intel_snps_phy.c
>> +++ b/drivers/gpu/drm/i915/display/intel_snps_phy.c
>> @@ -171,7 +171,7 @@ static const struct intel_mpllb_state dg2_dp_hbr3_100 = {
>> REG_FIELD_PREP(SNPS_PHY_MPLLB_FRACN_DEN, 1),
>> };
>>
>> -static const struct intel_mpllb_state *dg2_dp_100_tables[] = {
>> +static const struct intel_mpllb_state * const dg2_dp_100_tables[] = {
>> &dg2_dp_rbr_100,
>> &dg2_dp_hbr1_100,
>> &dg2_dp_hbr2_100,
>> @@ -284,7 +284,7 @@ static const struct intel_mpllb_state dg2_dp_hbr3_38_4 = {
>> REG_FIELD_PREP(SNPS_PHY_MPLLB_FRACN_QUOT, 61440),
>> };
>>
>> -static const struct intel_mpllb_state *dg2_dp_38_4_tables[] = {
>> +static const struct intel_mpllb_state * const dg2_dp_38_4_tables[] = {
>> &dg2_dp_rbr_38_4,
>> &dg2_dp_hbr1_38_4,
>> &dg2_dp_hbr2_38_4,
>> @@ -421,7 +421,7 @@ static const struct intel_mpllb_state dg2_edp_r432 = {
>> REG_FIELD_PREP(SNPS_PHY_MPLLB_SSC_STEPSIZE, 65752),
>> };
>>
>> -static const struct intel_mpllb_state *dg2_edp_tables[] = {
>> +static const struct intel_mpllb_state * const dg2_edp_tables[] = {
>> &dg2_dp_rbr_100,
>> &dg2_edp_r216,
>> &dg2_edp_r243,
>> @@ -584,7 +584,7 @@ static const struct intel_mpllb_state dg2_hdmi_594 = {
>> REG_FIELD_PREP(SNPS_PHY_MPLLB_SSC_UP_SPREAD, 1),
>> };
>>
>> -static const struct intel_mpllb_state *dg2_hdmi_tables[] = {
>> +static const struct intel_mpllb_state * const dg2_hdmi_tables[] = {
>> &dg2_hdmi_25_175,
>> &dg2_hdmi_27_0,
>> &dg2_hdmi_74_25,
>> @@ -593,7 +593,7 @@ static const struct intel_mpllb_state *dg2_hdmi_tables[] = {
>> NULL,
>> };
>>
>> -static const struct intel_mpllb_state **
>> +static const struct intel_mpllb_state * const *
>> intel_mpllb_tables_get(struct intel_crtc_state *crtc_state,
>> struct intel_encoder *encoder)
>> {
>> @@ -627,7 +627,7 @@ intel_mpllb_tables_get(struct intel_crtc_state *crtc_state,
>> int intel_mpllb_calc_state(struct intel_crtc_state *crtc_state,
>> struct intel_encoder *encoder)
>> {
>> - const struct intel_mpllb_state **tables;
>> + const struct intel_mpllb_state * const *tables;
>> int i;
>>
>> if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) {
>> @@ -823,7 +823,7 @@ void intel_mpllb_readout_hw_state(struct intel_encoder *encoder,
>>
>> int intel_snps_phy_check_hdmi_link_rate(int clock)
>> {
>> - const struct intel_mpllb_state **tables = dg2_hdmi_tables;
>> + const struct intel_mpllb_state * const *tables = dg2_hdmi_tables;
>> int i;
>>
>> for (i = 0; tables[i]; i++) {
>> --
>> 2.20.1
>>
--
Jani Nikula, Intel Open Source Graphics Center
next prev parent reply other threads:[~2021-08-26 9:27 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-25 14:58 [Intel-gfx] [PATCH] drm/i915/snps: constify struct intel_mpllb_state arrays harder Jani Nikula
2021-08-25 17:09 ` Matt Roper
2021-08-26 9:27 ` Jani Nikula [this message]
2021-08-25 19:32 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork
2021-08-26 1:21 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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